Abstract: A conductor track configuration for very large-scale integrated circuits includes at least two lower conductor tracks extending substantially in a first direction and at least two upper conductor tracks extending substantially in the first direction above the lower conductor tracks. Each of the lower conductor tracks is subdivided into segments, defining gaps between the segments. Each respective one of the segments has one contact leading to the upper conductor track disposed above the one segment. The lower conductor tracks adjacent the segments, as seen in a second direction, have one of the gaps at least in the vicinity of one of the contacts.

Abstract: Thin layers are deposited on a substrate such as a silicon substrate in series of evacuatable chambers into each of which an inert gas is admitted. In the case of a reactive sputtering deposition, a reactive gas is also admitted. Contamination between neighboring chambers with the reactive gas is prevented, and the chambers are rapidly charged with new reactive gas to achieve a stable gas flow by providing an inlet system including a pair of shut-off valves, and a closable flow governor, the shut-off valves and the flow governor being actuated in synchronism.

Abstract: A method for producing consecutive layers of titanium and titanium nitride on a substrate to produce a contact and barrier layer between, for example, aluminum and silicon surfaces or silicide surfaces utilizing cathode sputtering in a one chamber magnetron sputtering system. The titanium and titanium nitride layers each occur as a plurality of individual layers formed in a cyclical process with temperature treatments being carried out between the deposition of the individual layers. During the deposition of the titanium nitride layer, the nitrogen concentration in the reaction gas is adjusted higher than that stoichiometrically required for production of titanium nitride. The resulting combined layers provide low mechanical stressing, good thermal stability, low contact resistance and similar advantages. The method may be employed for the production of megabit-DRAM cells and logic circuits.