Patents by Inventor Arthur DANSKIN

Arthur DANSKIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10289418
    Abstract: Techniques are provided for handling a trap encountered in a thread that is part of a thread array that is being executed in a plurality of execution units. In these techniques, a data structure with an identifier associated with the thread is updated to indicate that the trap occurred during the execution of the thread array. Also in these techniques, the execution units execute a trap handling routine that includes a context switch. The execution units perform this context switch for at least one of the execution units as part of the trap handling routine while allowing the remaining execution units to exit the trap handling routine before the context switch. One advantage of the disclosed techniques is that the trap handling routine operates efficiently in parallel processors.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: May 14, 2019
    Assignee: NVIDIA CORPORATION
    Inventors: Gerald F. Luiz, Philip Alexander Cuadra, Luke Durant, Shirish Gadre, Robert Ohannessian, Lacky V. Shah, Nicholas Wang, Arthur Danskin
  • Patent number: 9471456
    Abstract: One or more embodiments of the invention are directed to a method including monitoring execution of a set of programs each including a set of instructions executing interleaved with other instructions of the set of instructions, where each of the set of instructions includes at least one operation operating on a set of threads; organizing a first set of instructions corresponding to a first program of the set of programs based on an execution order of the first set of instructions; generating a result set representing the first set of instructions organized based on the execution order; and displaying the result set.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: October 18, 2016
    Assignee: NVIDIA CORPORATION
    Inventors: Stephen Bartnikowski, Arthur Danskin, Gerald Luiz
  • Publication number: 20140344556
    Abstract: One or more embodiments of the invention are directed to a method including monitoring execution of a set of programs each including a set of instructions executing interleaved with other instructions of the set of instructions, where each of the set of instructions includes at least one operation operating on a set of threads; organizing a first set of instructions corresponding to a first program of the set of programs based on an execution order of the first set of instructions; generating a result set representing the first set of instructions organized based on the execution order; and displaying the result set.
    Type: Application
    Filed: May 15, 2013
    Publication date: November 20, 2014
    Applicant: NVIDIA Corporation
    Inventors: Stephen BARTNIKOWSKI, Arthur DANSKIN, Gerald LUIZ
  • Publication number: 20140189329
    Abstract: Techniques are provided for handling a trap encountered in a thread that is part of a thread array that is being executed in a plurality of execution units. In these techniques, a data structure with an identifier associated with the thread is updated to indicate that the trap occurred during the execution of the thread array. Also in these techniques, the execution units execute a trap handling routine that includes a context switch. The execution units perform this context switch for at least one of the execution units as part of the trap handling routine while allowing the remaining execution units to exit the trap handling routine before the context switch. One advantage of the disclosed techniques is that the trap handling routine operates efficiently in parallel processors.
    Type: Application
    Filed: December 27, 2012
    Publication date: July 3, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Gerald F. LUIZ, Philip Alexander CUADRA, Luke DURANT, Shirish GADRE, Robert OHANNESSIAN, Lacky V. SHAH, Nicholas WANG, Arthur DANSKIN