Abstract: A substrate with differing dielectric constant materials is provided. The substrate includes a first ground plane, a second ground plane, a first conductive trace, a first material having a first dielectric constant, and a second material having a second dielectric constant. The first material is disposed between the first ground plane and the first conductive trace, and the second material is disposed between the second ground plane and at least part of the first conductive trace. The first dielectric constant is different from the second dielectric constant.

Abstract: A semiconductor device with a hybrid bonded interface having microfluidic channels is provided. The semiconductor device includes a first die comprising a first passivation layer, wherein the first passivation layer includes one or more first trenches, and a second die comprising a second passivation layer, wherein the second passivation layer includes one or more second trenches. The first die is bonded to the second die via hybrid copper-to-copper bonding, wherein the one or more first trenches and the one or more second trenches form one or more channels.

Abstract: An apparatus includes a substrate that includes one or more routing layers, and an optical module coupled to the substrate. The optical module includes a photonic integrated circuit (PIC) and electronic integrated circuit (EIC), wherein the photonic integrated circuit is at least partially embedded within the substrate. The apparatus further includes a fiber optic coupler coupled to at least one of the substrate or PIC, wherein the PIC is configured to transmit or receive an optical signal via the fiber optic coupler.

Abstract: Novel tools and techniques are provided for implementing edge seal for bonded stacks of different size semiconductor devices. In various embodiments, a semiconductor device is provided that includes a composite structure and a sealant material. The composite structure includes two or more semiconductor devices that form a stacked configuration with one semiconductor device being disposed on or over each of one or more other semiconductor devices (of different size compared with that of the one semiconductor device) and with interface components of the one semiconductor device being bonded with corresponding interface components to each of the one or more other semiconductor devices in the stacked configuration. The sealant material is disposed along one or more surface portions of the composite structure to cover a region including at least portions of side surfaces of the composite structure that extend to cover at least each interface portion between stacked semiconductor devices.

Abstract: Novel tools and techniques are provided for implementing a substrate with an elastomer layer. The substrate might include one or more interconnects and an elastomer layer comprising at least one conductor. In some instances, the at least one conductor of the elastomer layer couples to at least one of the one or more interconnects of the substrate. Additionally, the at least one conductor is configured to couple at least one of the one or more interconnects of the substrate to a circuit board.

Abstract: Novel tools and techniques are provided for implementing novel semiconductor package interconnection structure(s) between package substrate and PCB. In various embodiments, a semiconductor device comprises: a substrate; a plurality of posts; a plurality of solder anchor portions; and a plurality of solder balls. Each post is coupled at a proximal end to a conductive point on a layer of the substrate, and has a length extending along its axis between its proximal and distal ends and a width orthogonal to the length. Each solder anchor portion is coupled to the distal end of a corresponding post, and has a width that is larger than the width of a distal end of a pillar portion of the corresponding post. Each solder ball is disposed on and around a corresponding solder anchor portion, the solder balls and corresponding posts forming conductive interconnects between corresponding substrate conductive points and corresponding PCB contact points.

Abstract: A semiconductor package with integrated side wall antennas is provided. An apparatus includes two or more die layers that are bonded together, each of the two or more die layers comprising a top surface, bottom surface, and one or more side walls. A first side wall of the one or more side walls includes a first antenna array, the first antenna array comprising a first plurality of antenna array elements formed in at least one of the two or more die layers, wherein the first plurality of antenna array elements is at least partially exposed at the first side wall.

Abstract: Tools and techniques for a semiconductor package providing side wall interconnections are provided. An apparatus includes two or more die layers that are bonded together, the first 3D stacked die package comprising a top surface, bottom surface, and one or more side walls. A first side wall of the one or more side walls includes two or more side wall pads, wherein each side wall pad of the two or more side wall pads is coupled to an interconnect of a respective die layer of the two or more die layers.

Abstract: Novel tools and techniques are provided for implementing mixed dielectric materials for improving signal integrity of integrated electronics packages or semiconductor packages. In various embodiments, a substrate for a semiconductor device includes: a first layer made of a first material; a second layer made of a second material; and a third layer disposed between the first and second layers, and that is made of a third material different from the first and second materials. In some cases, the first, second, and third layers each contains a plurality of gas-filled regions (e.g., but not limited to, an aerogel core of the third layer and/or polymer resin matrix embedded with hollow silica spheres or aerogel spheres of the first and second layers, or the like). Coaxial ground shields around signal lines in the substrate can be used to improve signal integrity. High dielectric constant lossy lines between signal lines can reduce crosstalk.

Abstract: Novel tools and techniques are provided for implementing cantilevered power planes to provide a return current path for high-speed signals. In various embodiments, a semiconductor package includes a substrate core, a plurality of layers, and an AC coupler(s). The plurality of layers includes power, ground, and signal layers each layer disposed on or above the substrate core, each signal layer being disposed between a power layer and a ground layer, the power layer and the ground layer each providing a return path for high frequency (e.g., 1 kHz or greater) signals carried by each signal layer. Each dielectric layer is disposed between and in contact with a pair of power, ground, or signal layer. The AC coupler(s) is coupled to each of a power layer(s) and a ground layer(s), without any portion of any power layer that is near an edge of the substrate core being anchored to the substrate core.

Abstract: An apparatus includes an interposer comprising one or more area array interconnections, the one or more area array interconnections including a first type of area array interconnection and a second type of area array interconnection. The apparatus further includes a first die coupled to the interposer via the first type of area array interconnection, and a second die coupled to the interposer via the second type of area array interconnection, wherein the first type of area array interconnection is different from the second type of area array interconnection.

Abstract: An apparatus includes a substrate that includes one or more routing layers, and an optical module coupled to the substrate. The optical module includes a photonic integrated circuit (PIC) and electronic integrated circuit (EIC), wherein the photonic integrated circuit is at least partially embedded within the substrate. The apparatus further includes a fiber optic coupler coupled to at least one of the substrate or PIC, wherein the PIC is configured to transmit or receive an optical signal via the fiber optic coupler.

Abstract: Novel tools and techniques are provided for implementing a semiconductor package or a chip package, and more particularly, for implementing a semiconductor package or a chip package including a core or a multilayer core having one or more variable width vias or one or more offset vias. In various embodiments, an apparatus includes a substrate. The substrate includes a core. The core may include one or more vias extending through the core. At least one via of the one or more vias includes a cross-section that varies along a length of the at least one via as the via extends through the core. The cross-section of the via may vary based on at least one of varying a width of the at least one via or offsetting a first portion of the at least one via from a second portion of the at least one via.

Abstract: According to a computer-implemented method, multiple potential objects of interest are identified from a camera feed of a source camera. A number of adjacent cameras are identified along possible travel routes. For each adjacent camera, it is detected whether any of the multiple potential objects of interest are identified in an associated camera feed. For each adjacent camera whose feed does not include any potential object of interest, analysis of downstream camera feeds is prevented during tracking of the multiple potential objects of interest.

Abstract: Embodiments of the present invention enable users to extract knowledge from testing scenarios performed during application development, and later employ that knowledge to interpret application usage scenarios to enhance serviceability of applications by expediting identification and solving of problems. In an exemplary embodiment, log data generated during simulation of test cases is analyzed to create one or more rules based on patterns in which one or more log entries appear in the log data. Later, log data may be analyzed to look for a pattern of log entries that matches a pattern-based rule, thereby facilitating faster identification and resolution of the problem.

Abstract: In described embodiments, a strength testing device that can be applied to a weight stack is provided. The strength testing device can be used in physical therapy, chiropractics, or other rehabilitation professionals to assess the strength of a patient. The strength testing device can also be used in the fitness industry by strength coaches and personal trainers.

Abstract: Just-in-time data migration in a live system is provided. Changes in a subscription that include structure, syntax, semantic, and identifier changes in data corresponding to the subscription are indicted to a new target system. A request to run an operation corresponding to the subscription on the new target system is received from a client device user. It is determined whether the operation needs related subscription data from a legacy system. In response to determining that the operation does need the related subscription data from the legacy system, the related subscription data for the operation is transformed just-in-time to support just-in-time migration of the related subscription data from the legacy system to the new target system. The operation is run on the new target system generating a new identifier for the subscription while referencing the related subscription data being migrated just-in-time from the legacy system.

Abstract: According to a computer-implemented method, multiple potential objects of interest are identified from a camera feed of a source camera. A number of adjacent cameras are identified along possible travel routes. For each adjacent camera, it is detected whether any of the multiple potential objects of interest are identified in an associated camera feed. For each adjacent camera whose feed does not include any potential object of interest, analysis of downstream camera feeds is prevented during tracking of the multiple potential objects of interest.

Abstract: Hexagonally arranged connection patterns for device packaging allow high density circuitry dies to be assembled into packages of manufacturable size. The connection patterns may be patterns for solder ball arrays or other types of connection mechanisms under a semiconductor package. Despite the increased density of the connection patterns, the connection patterns meet the demanding crosstalk specifications for high speed operation of the high density circuitry.

Abstract: Just-in-time data migration in a live system is provided. Changes in a subscription that include structure, syntax, semantic, and identifier changes in data corresponding to the subscription are indicted to a new target system. A request to run an operation corresponding to the subscription on the new target system is received from a client device user. It is determined whether the operation needs related subscription data from a legacy system. In response to determining that the operation does need the related subscription data from the legacy system, the related subscription data for the operation is transformed just-in-time to support just-in-time migration of the related subscription data from the legacy system to the new target system. The operation is run on the new target system generating a new identifier for the subscription while referencing the related subscription data being migrated just-in-time from the legacy system.