Abstract: A power conversion apparatus is provided with a plurality of DC-DC converters. Each of the DC-DC converters includes at least one gate resistor and a gate driver. The gate driver is configured to selectively connect a gate electrode of a switching element, via the gate resistor, with one of an on-potential point and an off-potential point. A gate resistor of a second DC-DC converter has a higher resistance than a gate resistor of a first DC-DC converter.

Abstract: A gate voltage control apparatus is configured to perform first to third processes when turning off the gate type switching device. In the first process, the gate voltage is decreased to a value lower than a threshold value so as to increase a voltage between main terminals. In the second process, the gate voltage is controlled at a value higher than the threshold voltage after timing on which the voltage between the main terminals makes a peak value during the first process. In the third process, the gate voltage is decreased to a value equal to or lower than a threshold voltage while the voltage between the main terminals remains at a value lower than the peak value and higher than the on voltage during the second process.

Abstract: A power conversion apparatus is provided with a plurality of DC-DC converters. Each of the DC-DC converters includes at least one gate resistor and a gate driver. The gate driver is configured to selectively connect a gate electrode of a switching element, via the gate resistor, with one of an on-potential point and an off-potential point. A gate resistor of a second DC-DC converter has a higher resistance than a gate resistor of a first DC-DC converter.

Abstract: A gate voltage control apparatus is configured to perform first to third processes when turning off the gate type switching device. In the first process, the gate voltage is decreased to a value lower than a threshold value so as to increase a voltage between main terminals. In the second process, the gate voltage is controlled at a value higher than the threshold voltage after timing on which the voltage between the main terminals makes a peak value during the first process. In the third process, the gate voltage is decreased to a value equal to or lower than a threshold voltage while the voltage between the main terminals remains at a value lower than the peak value and higher than the on voltage during the second process.