Patents by Inventor Asao Kokubo
Asao Kokubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8548393Abstract: An electronic apparatus includes: a clock generation section which generates and outputs a clock of a frequency according to a state; and an MPU and a DSP which, being supplied with the clock generated by the clock generation section, execute processes at a processing speed synchronized with the clock. The electronic apparatus further includes: a load prediction section which predicts a DSP load based on a DSP application to be executed now out of DSP applications installed by being coded for processing by the DSP as well as on a frequency of a clock currently being outputted from the clock generation section; and a load allocation section which allocates part of processes of the DSP application to be executed now to the MPU, based on the load predicted by the load prediction section and thereby makes the MPU execute the part of processes.Type: GrantFiled: September 17, 2009Date of Patent: October 1, 2013Assignee: Fujitsu LimitedInventor: Asao Kokubo
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Patent number: 7920181Abstract: The challenge of the present invention is to suppress a variation in brightness of an image and make a reference value of a black level converge at an appropriate value in a short time. A condition judgment circuit judges whether or not a frame of an amount of change in gains of a variable gain amplifier being equal to or greater than a threshold continues for a predefined frames or more. If a frame of an amount of change in the gains being equal to or greater than the threshold continues for the predefined frames, a black level value of the current frame is set for new black level reference. If not continues for the predetermined number, the previous black level reference value is retained in lieu of correcting the black level.Type: GrantFiled: February 24, 2006Date of Patent: April 5, 2011Assignee: Fujitsu Semiconductor LimitedInventors: Asao Kokubo, Hiroshi Daiku, Jun Funakoshi, Tsuyoshi Higuchi
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Patent number: 7715617Abstract: A semiconductor integrated circuit includes a check unit which compares a value of a pixel of interest with values of neighboring pixels contained in an image signal supplied from an image sensor, and determines based on the comparison whether the pixel of interest is defective, and a defect correcting unit which corrects the value of the pixel of interest by using values of surrounding pixels in response to the determination by the check unit that the pixel of interest is defective.Type: GrantFiled: August 28, 2007Date of Patent: May 11, 2010Assignee: Fujitsu Microelectronics LimitedInventors: Shigeru Nishio, Hiroshi Daiku, Asao Kokubo
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Publication number: 20100009726Abstract: An electronic apparatus includes: a clock generation section which generates and outputs a clock of a frequency according to a state; and an MPU and a DSP which, being supplied with the clock generated by the clock generation section, execute processes at a processing speed synchronized with the clock. The electronic apparatus further includes: a load prediction section which predicts a DSP load based on a DSP application to be executed now out of DSP applications installed by being coded for processing by the DSP as well as on a frequency of a clock currently being outputted from the clock generation section; and a load allocation section which allocates part of processes of the DSP application to be executed now to the MPU, based on the load predicted by the load prediction section and thereby makes the MPU execute the part of processes.Type: ApplicationFiled: September 17, 2009Publication date: January 14, 2010Applicant: FUJITSU LIMITEDInventor: Asao Kokubo
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Patent number: 7626616Abstract: An automatic gain control circuit generates, based on comparison between an average brightness of brightness data output for each frame from an image sensor and a target brightness, an integration time adjustment signal for adjusting an integration time during which the image sensor is exposed, a gain adjustment signal for adjusting gain of an amplifier that amplifies an output signal of the image sensor, and a frame rate adjustment signal for changing a frame rate. The automatic gain control circuit includes an exposure control circuit for adjusting a blanking time of each frame and generating, as the frame rate adjustment signal, a maximum integration time adjustment signal for switching a maximum integration time of the image sensor.Type: GrantFiled: July 19, 2006Date of Patent: December 1, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Asao Kokubo, Hiroshi Daiku, Yutaka Takeda, Norihiro Yoshida
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Patent number: 7612810Abstract: A solid-state imaging device includes an image sensor configured to output image data generated by image sensing elements together with a timing signal, and an image processing unit configured to output the image data supplied from the image sensor having undergone predetermined signal processing a predetermined delay time after a timing indicated by the timing signal, the image sensor further configured to make the timing signal indicate a first timing that is at least the processing delay time earlier than a second timing indicative of a start of a valid period of the image data, and to output dummy data from the first timing to the start of the valid period of the image data.Type: GrantFiled: October 20, 2004Date of Patent: November 3, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Asao Kokubo, Hiroshi Daiku, Jun Funakoshi, Yutaka Takeda, Norihiro Yoshida
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Patent number: 7522199Abstract: An imaging device provided with a read circuit in which a light-shielding region is formed in a part of an image region where a plurality of optical/electrical conversion devices is two-dimensionally arrayed in the row and column directions and which converts a optically detected signal outputted from each of the optical/electrical conversion devices for each of the column into a digital signal, comprises a storage device for storing the outputted digital signal outputted in relation with the optical/electrical conversion device in the light-shielding region and a difference calculation device for calculating a difference between the outputted digital signal in relation with the optical/electrical conversion device in a light-receiving region except the light-shielding region and a value stored in the storage device.Type: GrantFiled: November 24, 2004Date of Patent: April 21, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Jun Funakoshi, Katsuyoshi Yamamoto, Asao Kokubo, Toshitaka Mizuguchi, Tsuyoshi Higuchi
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Patent number: 7489347Abstract: A flicker noise detecting method that shortens the time for detecting flicker noise. The method sets two of a plurality of horizontal lines forming a frame as average brightness calculation regions that are separated from each other by the predetermined number of the horizontal lines, calculates an average brightness of the two average brightness calculation regions for each of three frames, multiplies each average brightness by a product sum calculation coefficient, and adds the products to generate a sum and generate a detection signal of flicker noise based on the sum. The product sum calculation coefficient is obtained by plotting one cycle of a sine wave and one cycle of a cosine wave at intervals of ?/3.Type: GrantFiled: September 20, 2004Date of Patent: February 10, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Hiroshi Daiku, Asao Kokubo
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Patent number: 7456876Abstract: An image processing circuit for a color image sensor, comprising a color sensitivity correction circuit which adds/subtracts a predetermined offset to/from pixel signals being output by amplifying photoelectric conversion signals of pixels, which have photoelectric conversion element and are arranged in column and row directions, for each column, and multiplies the result by a predetermined gain, wherein the predetermined offset includes a first offset, which is set according to each color, and a second offset, which is set according to a plurality of columns. According to the present invention, the offset of the color sensitivity correction circuit includes a first offset, which is set according to each color, and a second offset, which is set according to a plurality of columns, therefore, periodic moiré in the vertical direction, which is caused by the column output circuit and the output signal supply circuit for each column, can be suppressed, and image quality can be improved.Type: GrantFiled: July 24, 2003Date of Patent: November 25, 2008Assignee: Fujitsu LimitedInventors: Jun Funakoshi, Shigeru Nishio, Asao Kokubo, Masatoshi Kokubun
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Publication number: 20080252756Abstract: A semiconductor integrated circuit includes a check unit which compares a value of a pixel of interest with values of neighboring pixels contained in an image signal supplied from an image sensor, and determines based on the comparison whether the pixel of interest is defective, and a defect correcting unit which corrects the value of the pixel of interest by using values of surrounding pixels in response to the determination by the check unit that the pixel of interest is defective.Type: ApplicationFiled: August 28, 2007Publication date: October 16, 2008Inventors: Shigeru Nishio, Hiroshi Daiku, Asao Kokubo
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Patent number: 7352397Abstract: A semiconductor integrated circuit includes a differential calculating unit which obtains a differential between a value of a pixel of interest and values of surrounding pixels contained in an image signal supplied from an image sensor, a dead-zone generating unit which defines a predetermined range of pixel values, and a comparison unit which checks whether the differential falls outside the predetermined range, wherein contour enhancement is applied to the pixel of interest in response to a determination by the comparison unit that the differential falls outside the predetermined range.Type: GrantFiled: July 25, 2003Date of Patent: April 1, 2008Assignee: Fujitsu LimitedInventors: Shigeru Nishio, Hiroshi Daiku, Asao Kokubo
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Patent number: 7263215Abstract: A semiconductor integrated circuit includes a check unit which compares a value of a pixel of interest with values of neighboring pixels contained in an image signal supplied from an image sensor, and determines based on the comparison whether the pixel of interest is defective, and a defect correcting unit which corrects the value of the pixel of interest by using values of surrounding pixels in response to the determination by the check unit that the pixel of interest is defective.Type: GrantFiled: July 25, 2003Date of Patent: August 28, 2007Assignee: Fujitsu LimitedInventors: Shigeru Nishio, Hiroshi Daiku, Asao Kokubo
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Publication number: 20070075772Abstract: The challenge of the present invention is to suppress a variation in brightness of an image and make a reference value of a black level converge at an appropriate value in a short time. Acondition judgment circuit judges whether or not a frame of an amount of change in gains of a variable gain amplifier being equal to or greater than a threshold continues for a predefined frames or more. If a frame of an amount of change in the gains being equal to or greater than the threshold continues for the predefined frames, a black level value of the current frame is set for new black level reference. If not continues for the predetermined number, the previous black level reference value is retained in lieu of correcting the black level.Type: ApplicationFiled: February 24, 2006Publication date: April 5, 2007Inventors: Asao Kokubo, Hiroshi Daiku, Jun Funakoshi, Tsuyoshi Higuchi
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Publication number: 20060256207Abstract: An automatic gain control circuit generates, based on comparison between an average brightness of brightness data output for each frame from an image sensor and a target brightness, an integration time adjustment signal for adjusting an integration time during which the image sensor is exposed, a gain adjustment signal for adjusting gain of an amplifier that amplifies an output signal of the image sensor, and a frame rate adjustment signal for changing a frame rate. The automatic gain control circuit includes an exposure control circuit for adjusting a blanking time of each frame and generating, as the frame rate adjustment signal, a maximum integration time adjustment signal for switching a maximum integration time of the image sensor.Type: ApplicationFiled: July 19, 2006Publication date: November 16, 2006Inventors: Asao Kokubo, Hiroshi Daiku, Yutaka Takeda, Norihiro Yoshida
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Patent number: 7106912Abstract: A circuit for correction of white pixel defects capable of complementing white pixel faults without using a storage device for holding white pixel fault spots, and an image sensor using the circuit for correction of white pixel defects. Pixels constituting a pixel section are sequentially subjected to white pixel fault complementation process. A nearby pixel data holding section acquires pixel data from a readout circuit and holds the data. A comparison-determination section compares lightness of a target pixel with that of a nearby pixel and determines, based on the comparison result, whether or not the target pixel is associated with a white pixel fault having a lightness higher than that of the nearby pixel by a predetermined value or more.Type: GrantFiled: February 5, 2003Date of Patent: September 12, 2006Assignee: Fujitsu LimitedInventors: Asao Kokubo, Jun Funakoshi, Katsuyoshi Yamamoto
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Publication number: 20060176382Abstract: In an image sensor provided with an AD conversion circuit in each column, the offset value of each AD conversion circuit disposed in each column is corrected, using a value based on the output in each column of a plurality of lines composed of shielded pixels in order to provide an effective method for reducing vertically-striped noise due to the variation of the offset element of the AD conversion circuit.Type: ApplicationFiled: June 3, 2005Publication date: August 10, 2006Inventors: Asao Kokubo, Hiroshi Daiku, Jun Funakoshi, Hiroshi Kobayashi, Wakako Hoshino
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Publication number: 20060001753Abstract: An imaging device provided with a read circuit in which a light-shielding region is formed in a part of an image region where a plurality of optical/electrical conversion devices is two-dimensionally arrayed in the row and column directions and which converts a optically detected signal outputted from each of the optical/electrical conversion devices for each of the column into a digital signal, comprises a storage device for storing the outputted digital signal outputted in relation with the optical/electrical conversion device in the light-shielding region and a difference calculation device for calculating a difference between the outputted digital signal in relation with the optical/electrical conversion device in a light-receiving region except the light-shielding region and a value stored in the storage device.Type: ApplicationFiled: November 24, 2004Publication date: January 5, 2006Inventors: Jun Funakoshi, Katsuyoshi Yamamoto, Asao Kokubo, Toshitaka Mizuguchi, Tsuyoshi Higuchi
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Publication number: 20050285961Abstract: A solid-state imaging device includes an image sensor configured to output image data generated by image sensing elements together with a timing signal, and an image processing unit configured to output the image data supplied from the image sensor having undergone predetermined signal processing a predetermined delay time after a timing indicated by the timing signal, the image sensor further configured to make the timing signal indicate a first timing that is at least the processing delay time earlier than a second timing indicative of a start of a valid period of the image data, and to output dummy data from the first timing to the start of the valid period of the image data.Type: ApplicationFiled: October 20, 2004Publication date: December 29, 2005Inventors: Asao Kokubo, Hiroshi Daiku, Jun Funakoshi, Yutaka Takeda, Norihiro Yoshida
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Publication number: 20050206745Abstract: A flicker noise detecting method that shortens the time for detecting flicker noise. The method sets two of a plurality of horizontal lines forming a frame as average brightness calculation regions that are separated from each other by the predetermined number of the horizontal lines, calculates an average brightness of the two average brightness calculation regions for each of three frames, multiplies each average brightness by a product sum calculation coefficient, and adds the products to generate a sum and generate a detection signal of flicker noise based on the sum. The product sum calculation coefficient is obtained by plotting one cycle of a sine wave and one cycle of a cosine wave at intervals of ?/3.Type: ApplicationFiled: September 20, 2004Publication date: September 22, 2005Inventors: Hiroshi Daiku, Asao Kokubo
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Publication number: 20040119859Abstract: A semiconductor integrated circuit includes a differential calculating unit which obtains a differential between a value of a pixel of interest and values of surrounding pixels contained in an image signal supplied from an image sensor, a dead-zone generating unit which defines a predetermined range of pixel values, and a comparison unit which checks whether the differential falls outside the predetermined range, wherein contour enhancement is applied to the pixel of interest in response to a determination by the comparison unit that the differential falls outside the predetermined range.Type: ApplicationFiled: July 25, 2003Publication date: June 24, 2004Applicant: FUJITSU LIMITEDInventors: Shigeru Nishio, Hiroshi Daiku, Asao Kokubo