Patents by Inventor Ashley Rebelo
Ashley Rebelo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8981864Abstract: Multi-layer in integrated transmission line circuits are provided having improved signal loss characteristics. A multi-layer integrated transmission line circuit, such as a stripline circuit or a microstrip circuit, comprises at least one reference layer; at least one conducting layer having one or more conducting strips, wherein the at least one conducting layer is separated from the at least one reference layer by a substrate; and at least one additional layer positioned between the at least one conducting layer and the at least one reference layer. The multi-layer integrated transmission line circuit may also comprise a dielectric insulating material, such as an organic material or a ceramic material. The additional layers increase a dielectric thickness of the multi-layer integrated transmission line circuit to reduce dielectric losses.Type: GrantFiled: April 30, 2012Date of Patent: March 17, 2015Assignee: LSI CorporationInventors: Daniel L. Gerlach, Ashley Rebelo
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Publication number: 20130285769Abstract: Multi-layer in integrated transmission line circuits are provided having improved signal loss characteristics. A multi-layer integrated transmission line circuit, such as a stripline circuit or a microstrip circuit, comprises at least one reference layer; at least one conducting layer having one or more conducting strips, wherein the at least one conducting layer is separated from the at least one reference layer by a substrate; and at least one additional layer positioned between the at least one conducting layer and the at least one reference layer. The multi-layer integrated transmission line circuit may also comprise a dielectric insulating material, such as an organic material or a ceramic material. The additional layers increase a dielectric thickness of the multi-layer integrated transmission line circuit to reduce dielectric losses.Type: ApplicationFiled: April 30, 2012Publication date: October 31, 2013Applicant: LSI CORPORATIONInventors: Daniel L. Gerlach, Ashley Rebelo
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Publication number: 20130161805Abstract: Provided, in one embodiment, is an integrated circuit (IC) leadframe. In one example, the leadframe includes a paddle, wherein the paddle has a surface configured to accept an IC chip and has at least one edge, the at least one edge having one or more slots located therein. In this example, the leadframe may further include a plurality of lead fingers having ends extending toward the at least one edge, wherein the ends of ones of pairs of adjacent lead fingers extend into corresponding slots in the paddle.Type: ApplicationFiled: December 21, 2011Publication date: June 27, 2013Applicant: LSI CorporationInventors: Clifford R. Fishley, John J. Krantz, Abiola Awujoola, Allen S. Lim, Stephen M. King, Lawrence W. Golick, Ashley Rebelo
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Patent number: 8370777Abstract: A method of generating a model of a leadframe IC package, a leadframe modeler and an IC design system are disclosed. In one embodiment the method includes: (1) adding connectivity information to a geometric representation of a leadframe, wherein the connectivity information represents electrical connections between the IC die and leads of the leadframe and (2) formatting the leads to represent BGA point of contacts for the IC die.Type: GrantFiled: June 16, 2009Date of Patent: February 5, 2013Assignee: LSI CorporationInventors: Donald E. Hawk, Jr., Stephen M. King, Jeffrey M. Klemovage, John J. Krantz, Allen S. Lim, Ashley Rebelo, Richard J. Sergi
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Patent number: 8084857Abstract: A method and article of manufacture for performing wire-bonding operations in an integrated circuit. In one aspect, the operations include the steps of bonding a wire to a first bond site in the integrated circuit and terminating the wire at a second bond site. The bonding and terminating steps are repeated for at least two differential wire bond pairs, and proximate differential wire bond pairs of the at least two differential wire bond pairs have substantially different wire bond profiles.Type: GrantFiled: January 22, 2010Date of Patent: December 27, 2011Assignee: Agere SystemsInventors: Gavin Appel, Ashley Rebelo, Christopher J. Wittensoldner
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Publication number: 20100318340Abstract: A method of generating a model of a leadframe IC package, a leadframe modeler and an IC design system are disclosed. In one embodiment the method includes: (1) adding connectivity information to a geometric representation of a leadframe, wherein the connectivity information represents electrical connections between the IC die and leads of the leadframe and (2) formatting the leads to represent BGA point of contacts for the IC die.Type: ApplicationFiled: June 16, 2009Publication date: December 16, 2010Applicant: LSI CorporationInventors: Donald E. Hawk, JR., Stephen M. King, Jeffrey M. Klemovage, John J. Krantz, Allen S. Lim, Ashley Rebelo, Richard J. Sergi
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Publication number: 20100120198Abstract: A method and article of manufacture for performing wire-bonding operations in an integrated circuit. In one aspect, the operations include the steps of bonding a wire to a first bond site in the integrated circuit and terminating the wire at a second bond site. The bonding and terminating steps are repeated for at least two differential wire bond pairs, and proximate differential wire bond pairs of the at least two differential wire bond pairs have substantially different wire bond profiles.Type: ApplicationFiled: January 22, 2010Publication date: May 13, 2010Inventors: Gavin Appel, Ashley Rebelo, Christopher J. Wittensoldner
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Patent number: 7675168Abstract: An integrated circuit comprises an integrated circuit package and one or more circuit elements disposed within the integrated circuit package. The integrated circuit also comprises at least two differential wire bond pairs providing connections for at least one of the one or more circuit elements. Proximate differential wire bond pairs of the at least two differential wire bond pairs have substantially different wire bond profiles.Type: GrantFiled: February 25, 2005Date of Patent: March 9, 2010Assignee: Agere Systems Inc.Inventors: Gavin Appel, Ashley Rebelo, Christopher J. Wittensoldner
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Patent number: 7671450Abstract: An integrated circuit package having a multi-segment transmission line transformer for impedance matching a packaged integrated circuit, such as a driver or receiver, to a printed circuit board (PCB) transmission line to which the packaged chip is attached by, for example, solder balls. In one exemplary embodiment, a three-segment transmission line transformer provides improved broadband performance with the advantage of having a middle segment with a flexible length for easier routing. The length of each end segment of the three-segment transformer is adjusted to provide at least partial cancellation of reflections between the PCB and the transformer, and between the transformer and a circuit on the integrated circuit, respectively. Further, the inductive reactance of the solder balls and via wiring may be cancelled out by the transformed chip impedance to provide a non-inductive termination to the PCB transmission line at approximately one-half the highest data rate of the channel.Type: GrantFiled: April 1, 2008Date of Patent: March 2, 2010Assignee: Agere Systems Inc.Inventors: Ellis E. Nease, Ashley Rebelo, Christopher J. Wittensoldner
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Patent number: 7667321Abstract: A wire bond circuit device has a circuit die in which substantially all of the input/output (I/O) pads are disposed along the outermost row of pads. A substrate onto which the die is disposed has wedges that are similarly arranged in rows, with the wedges used to carry I/O placed closest to the circuit die. As a result, lowest-tiered bond wire is used to connect the I/O-related pads to their respective wedges.Type: GrantFiled: March 12, 2007Date of Patent: February 23, 2010Assignee: Agere Systems Inc.Inventors: Ashley Rebelo, Todd Snider
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Publication number: 20090152689Abstract: An integrated circuit package having a multi-segment transmission line transformer for impedance matching a packaged integrated circuit, such as a driver or receiver, to a printed circuit board (PCB) transmission line to which the packaged chip is attached by, for example, solder balls. In one exemplary embodiment, a three-segment transmission line transformer provides improved broadband performance with the advantage of having a middle segment with a flexible length for easier routing. The length of each end segment of the three-segment transformer is adjusted to provide at least partial cancellation of reflections between the PCB and the transformer, and between the transformer and a circuit on the integrated circuit, respectively. Further, the inductive reactance of the solder balls and via wiring may be cancelled out by the transformed chip impedance to provide a non-inductive termination to the PCB transmission line at approximately one-half the highest data rate of the channel.Type: ApplicationFiled: April 1, 2008Publication date: June 18, 2009Applicant: AGERE SYSTEMS INC.Inventors: Ellis E. Nease, Ashley Rebelo, Christopher J. Wittensoldner
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Publication number: 20080227284Abstract: A wire bond circuit device has a circuit die in which substantially all of the input/output (I/O) pads are disposed along the outermost row of pads. A substrate onto which the die is disposed has wedges that are similarly arranged in rows, with the wedges used to carry I/O placed closest to the circuit die. As a result, lowest-tiered bond wire is used to connect the I/O-related pads to their respective wedges.Type: ApplicationFiled: March 12, 2007Publication date: September 18, 2008Applicant: Agere Systems, Inc.Inventors: Ashley Rebelo, Todd Snider
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Publication number: 20060192300Abstract: An integrated circuit comprises an integrated circuit package and one or more circuit elements disposed within the integrated circuit package. The integrated circuit also comprises at least two differential wire bond pairs providing connections for at least one of the one or more circuit elements. Proximate differential wire bond pairs of the at least two differential wire bond pairs have substantially different wire bond profiles.Type: ApplicationFiled: February 25, 2005Publication date: August 31, 2006Inventors: Gavin Appel, Ashley Rebelo, Christopher Wittensoldner