Patents by Inventor Ashok Nagarajan

Ashok Nagarajan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230034196
    Abstract: Techniques discussed herein include dynamically providing synchronous and/or asynchronous data processing by a machine-learning model service. The machine-learning model service (“the service”) executes a stream manager application, a web interface, and a machine-learning model via a common container. The stream manager application can obtain input data (e.g., from an input data stream, a partition of an input data stream, etc.) and provide the data to the machine-learning model through the web interface using a local communication channel (e.g., a loopback interface that bypasses local network interface hardware of the computing device on which the model executes). Prediction results from the model may be provided as output data (e.g., to an output data stream, to a partition of an output data stream, etc.).
    Type: Application
    Filed: July 28, 2021
    Publication date: February 2, 2023
    Applicant: Oracle International Corporation
    Inventors: Bryan James Phillippe, Ashok Nagarajan, Jeonghyeon Hwang, John James Backof, II
  • Patent number: 5148056
    Abstract: An output buffer circuit is disclosed that has optimized ground bounce characteristics while maintaining low propagation delay. The output buffer may be incorporated within an integrated circuit and may be embodied in either inverting or non-inverting and in either enabling and non-enabling configurations. The output buffer circuit includes a feedback means coupled to the output terminal of the output buffer and to a pull-down transistor. The feedback means provides a feedback voltage to the gate of the pull-down transistor to regulate the derivative of source current with respect to time. The feedback means includes a pair of field effect transistors and either an inverter gate or a NOR gate coupled across one of the feedback field effect transistors.
    Type: Grant
    Filed: March 27, 1991
    Date of Patent: September 15, 1992
    Assignee: MOS Electronics Corp.
    Inventors: Kevin W. Glass, Ashok Nagarajan