Patents by Inventor Asif Ahmad

Asif Ahmad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11980600
    Abstract: Described is a method of diagnosis or prognosis of preeclampsia in a pregnant subject, comprising providing a sample from a pregnant subject and measuring the ratio between the amount of (a) one or both of sFlt-1 and PlGF, and (b) one or both of a breakdown product of heme and a breakdown product of arginine, in the sample. Also described are assay kits and a computer adapted for use in the method. Also described is a method of treating preeclampsia, comprising administering a pharmaceutically effective amount of L-arginine and/or citrulline and an inhibitor of arginase or pharmaceutically acceptable salts thereof. Also described is a method of treating cancer, comprising treating a subject with a therapeutically effective amount of an anti-VEGF compound, L-arginine and an arginase inhibitor.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: May 14, 2024
    Assignee: MIRZYME THERAPEUTICS LIMITED
    Inventors: Asif Ahmed, Keqing Wang, Shakil Ahmad
  • Patent number: 11520651
    Abstract: A tool may identify and revert changes that caused network hardware components or hardware servers to malfunction. The tool builds and maintains a graph that represents the hardware components and servers in the system and their dependencies. When a change is made to the system, links and weights in the graph are adjusted to account for the changes. When a component or server is reported as malfunctioning, the tool traverses the graph to locate the changes that are the most likely root causes of the malfunction. The tool may then revert the change to resolve the malfunction.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: December 6, 2022
    Assignee: Bank of America Corporation
    Inventors: Surina Puri, Asif Ahmad Bala, Arjun Thimmareddy
  • Publication number: 20220012113
    Abstract: A tool may identify and revert changes that caused network hardware components or hardware servers to malfunction. The tool builds and maintains a graph that represents the hardware components and servers in the system and their dependencies. When a change is made to the system, links and weights in the graph are adjusted to account for the changes. When a component or server is reported as malfunctioning, the tool traverses the graph to locate the changes that are the most likely root causes of the malfunction. The tool may then revert the change to resolve the malfunction.
    Type: Application
    Filed: August 11, 2021
    Publication date: January 13, 2022
    Inventors: Surina Puri, Asif Ahmad Bala, Arjun Thimmareddy
  • Patent number: 11132249
    Abstract: A tool may identify and revert changes that caused network hardware components or hardware servers to malfunction. The tool builds and maintains a graph that represents the hardware components and servers in the system and their dependencies. When a change is made to the system, links and weights in the graph are adjusted to account for the changes. When a component or server is reported as malfunctioning, the tool traverses the graph to locate the changes that are the most likely root causes of the malfunction. The tool may then revert the change to resolve the malfunction.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: September 28, 2021
    Assignee: Bank of America Corporation
    Inventors: Surina Puri, Asif Ahmad Bala, Arjun Thimmareddy
  • Patent number: 11082056
    Abstract: A stage, suitable for use in an analog to digital converter or a digital to analog converter, can have a plurality of slices that can be operated together to form a composite output. The stage can have reduced thermal noise, while each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This feature allows a fast conversion to be achieved without loss of noise performance.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: August 3, 2021
    Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
    Inventors: Rares Bodnar, Asif Ahmad, Christopher Peter Hurrell
  • Publication number: 20200381108
    Abstract: An electronic medical record system monitors physician orders for diagnostic imaging and uses natural language processing to generate a field for characterizing the clinical significance of the image identified by the radiologist. This natural redundancy of evaluation of the efficacy of the imaging is used to generate reports allowing physicians to compare their effective use of diagnostic imaging against their peers.
    Type: Application
    Filed: August 3, 2020
    Publication date: December 3, 2020
    Inventors: Asif Ahmad, Ronald Alan Hosenfeld, II, Donald Renfrew, MD
  • Patent number: 10707889
    Abstract: An electronic circuit comprises multiple analog-to-digital converter (ADC) circuits and control logic circuitry. The control logic circuitry advances the multiple ADC circuits through multiple time-interleaved conversions that include time-interleaved acquisition phases, conversion phases, and tracking phases. An acquisition phase of a first ADC circuit samples the analog signal, a conversion phase of the first ADC circuit converts the sampled analog signal to a digital value, and the control logic circuitry is configured to update the first ADC circuit with most recent A/D conversion information by a different ADC circuit during a tracking phase of the first ADC circuit before the acquisition phase of the first ADC circuit.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: July 7, 2020
    Assignee: Analog Devices International Unlimited Company
    Inventors: Rares Andrei Bodnar, Christopher Peter Hurrell, Asif Ahmad
  • Publication number: 20200162095
    Abstract: A stage, suitable for use in an analog to digital converter or a digital to analog converter where the stage comprises a plurality of slices that can be operated together to form a composite output, can have reduced thermal noise, whilst each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This allows a fast conversion to be achieved without loss of noise performance.
    Type: Application
    Filed: November 22, 2019
    Publication date: May 21, 2020
    Applicant: Analog Devices Global Unlimited Company
    Inventors: Rares BODNAR, Asif AHMAD, Christopher Peter HURRELL
  • Patent number: 10516408
    Abstract: A stage, suitable for use in an analog to digital converter or a digital to analog converter, can have a plurality of slices that can be operated together to form a composite output. The stage can have reduced thermal noise, while each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This feature allows a fast conversion to be achieved without loss of noise performance.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: December 24, 2019
    Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANY
    Inventors: Rares Bodnar, Asif Ahmad, Christopher Peter Hurrell
  • Patent number: 10511316
    Abstract: A stage, suitable for use in and analog to digital converter or a digital to analog converter, comprises a plurality of slices. The slices can be operated together to form a composite output having reduced thermal noise, while each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This allows a fast conversion to be achieved without loss of noise performance. The slices can be sub-divided to reduce scaling mismatch between the most significant bit and the least significant bit. A shuffling scheme is implemented that allows shuffling to occur between the sub-sections of the slices without needing to implement a massively complex shuffler.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: December 17, 2019
    Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANY
    Inventors: Rares Bodnar, Roberto S. Maurino, Christopher Peter Hurrell, Asif Ahmad
  • Patent number: 10505561
    Abstract: A dither is an uncorrelated signal, usually pseudo-random noise injected into the input of an ADC such that a given input value of the wanted signal becomes spread over a plurality of codes. This reduces the effect of DNL and also smooths the integral non-linearity (INL) response of the ADC. The advantages of introducing dither could be obtained without having to perturb the signal input to the ADC. This avoids the introduction of additional components in the ADC. The dither can be applied to the components used to form a residue of the ADC stage within a pipelined converter. For example, a dither can be applied solely to a DAC part or different dithers can be applied to a ADC and DAC parts respectively. This allows greater flexibility of linearization of the ADC response and the formation of an analog residue by the DAC.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: December 10, 2019
    Assignee: Analog Devices Global Unlimited Company
    Inventors: Rares Bodnar, Asif Ahmad, Christopher Peter Hurrell
  • Patent number: 10476821
    Abstract: Disclosed herein is a secure messaging engagement hub for structuring of unstructured electronic messages. The secure messaging engagement hub has a natural language processor that structures an unstructured electronic message. The natural language processor structures the unstructured electronic message by using a lexical parser to parse free text within the unstructured electronic message. The natural language processor also may tokenize the parsed free text into tokens representing components of the parsed free text. Message component n-grams are generated based on the tokens representing the components of the parsed free text. The tokens are coded with various metadata tags based on an analysis of the tokens. The metadata tags indicate message components of the tokens. And a structured electronic message corresponding to the unstructured electronic message is generated, the structured electronic message comprising the tokens and the metadata tags.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: November 12, 2019
    Assignee: ATOS DIGITAL HEALTH SOLUTIONS, INC.
    Inventors: Asif Ahmad, David Raju Manne, Pranam Ben
  • Publication number: 20190280705
    Abstract: A stage, suitable for use in an analog to digital converter or a digital to analog converter, can have a plurality of slices that can be operated together to form a composite output. The stage can have reduced thermal noise, while each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This feature allows a fast conversion to be achieved without loss of noise performance.
    Type: Application
    Filed: March 8, 2018
    Publication date: September 12, 2019
    Applicant: Analog Devices Global Unlimited Company
    Inventors: Rares BODNAR, Asif AHMAD, Christopher Peter HURRELL
  • Publication number: 20190280704
    Abstract: A stage, suitable for use in and analog to digital converter or a digital to analog converter, comprises a plurality of slices. The slices can be operated together to form a composite output having reduced thermal noise, while each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This allows a fast conversion to be achieved without loss of noise performance. The slices can be sub-divided to reduce scaling mismatch between the most significant bit and the least significant bit. A shuffling scheme is implemented that allows shuffling to occur between the sub-sections of the slices without needing to implement a massively complex shuffler.
    Type: Application
    Filed: August 2, 2018
    Publication date: September 12, 2019
    Applicant: Analog Devices Global Unlimited Company
    Inventors: Rares BODNAR, Roberto S. MAURINO, Christopher Peter HURRELL, Asif AHMAD
  • Publication number: 20190280706
    Abstract: A dither is an uncorrelated signal, usually pseudo-random noise injected into the input of an ADC such that a given input value of the wanted signal becomes spread over a plurality of codes. This reduces the effect of DNL and also smooths the integral non-linearity (INL) response of the ADC. The advantages of introducing dither could be obtained without having to perturb the signal input to the ADC. This avoids the introduction of additional components in the ADC. The dither can be applied to the components used to form a residue of the ADC stage within a pipelined converter. For example, a dither can be applied solely to a DAC part or different dithers can be applied to a ADC and DAC parts respectively. This allows greater flexibility of linearization of the ADC response and the formation of an analog residue by the DAC.
    Type: Application
    Filed: August 2, 2018
    Publication date: September 12, 2019
    Applicant: Analog Devices Global Unlimited Company
    Inventors: Rares BODNAR, Asif AHMAD, Christopher Peter HURRELL
  • Publication number: 20150286790
    Abstract: Disclosed herein is a secure messaging engagement hub for structuring of unstructured electronic messages. The secure messaging engagement hub has a natural language processor that structures an unstructured electronic message. The natural language processor structures the unstructured electronic message by using a lexical parser to parse free text within the unstructured electronic message. The natural language processor also may tokenize the parsed free text into tokens representing components of the parsed free text. Message component n-grams are generated based on the tokens representing the components of the parsed free text. The tokens are coded with various metadata tags based on an analysis of the tokens. The metadata tags indicate message components of the tokens. And a structured electronic message corresponding to the unstructured electronic message is generated, the structured electronic message comprising the tokens and the metadata tags.
    Type: Application
    Filed: May 27, 2015
    Publication date: October 8, 2015
    Inventors: Asif Ahmad, David Raju Manne, Pranam Ben
  • Publication number: 20140297320
    Abstract: Systems and methods are provided for the operation of a personal healthcare management portal operable to provide multiple users secure access to a patient's healthcare information. A selection of a patient healthcare management portal associated with a patient may be received by an application tier. The application tier may receive authentication information associated with the selection of the patient healthcare management portal associated with the patient. The application tier may determine if the authentication information is associated with a users valid login credentials. The application tier may receive a request to access patient information, wherein the patient information includes at least one of records, forms, or services associated with the patient. The application tier may also retrieve the requested patient information. The application tier may communicate the requested information to a client device from which the selection originated.
    Type: Application
    Filed: March 29, 2013
    Publication date: October 2, 2014
    Applicant: MCKESSON SPECIALTY CARE DISTRIBUTION CORPORATION
    Inventors: Asif H. Jiwani, Alan Chad Stickler, Asif Ahmad
  • Patent number: 7928744
    Abstract: A measuring apparatus including a self test function, the circuit comprising a capacitor; first to fourth switches; a test signal injector; at least one comparator having a signal input and a reference input the first switch being interposed between a first plate of the capacitor and a first input node, the second switch being interposed between a second plate of the capacitor and a second input node, the third switch being interposed between the first plate of the capacitor and the signal input of the comparator and the fourth switch being interposed between the second plate of the capacitor and a voltage reference, wherein the self test function comprises the steps of i) operating the signal injector to produce a first signal representative of an out of range voltage for an expected voltage difference between the first and second input nodes, and using the signal to cause the at least one comparator to place its output in an error state, and to charge the capacitor to the out of range voltage, ii) isolating
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: April 19, 2011
    Assignee: Analog Devices, Inc.
    Inventors: Colin Price, Steven Boyle, Asif Ahmad
  • Publication number: 20100134132
    Abstract: A measuring apparatus including a self test function, the circuit comprising a capacitor; first to fourth switches; a test signal injector; at least one comparator having a signal input and a reference input the first switch being interposed between a first plate of the capacitor and a first input node, the second switch being interposed between a second plate of the capacitor and a second input node, the third switch being interposed between the first plate of the capacitor and the signal input of the comparator and the fourth switch being interposed between the second plate of the capacitor and a voltage reference, wherein the self test function comprises the steps of i) operating the signal injector to produce a first signal representative of an out of range voltage for an expected voltage difference between the first and second input nodes, and using the signal to cause the at least one comparator to place its output in an error state, and to charge the capacitor to the out of range voltage, ii) isolating
    Type: Application
    Filed: December 2, 2008
    Publication date: June 3, 2010
    Applicant: ANALOG DEVICES, INC.
    Inventors: Colin PRICE, Steven BOYLE, Asif AHMAD
  • Patent number: 7023372
    Abstract: A switched-capacitor circuit for use in analog-to-digital conversion samples an input signal with respect to a reference voltage such that it significantly reduces a DAC settling time interval during each bit trial. In one exemplary embodiment, the switched-capacitor circuit having first and second groups of capacitor banks is coupled to a first input of a comparator and to a control circuit which provides control signals such that during a switching sequence, an equal value of capacitance is selected from each of the first and second groups of capacitor banks to reduce the DAC settling time interval, thereby improving the conversion rate.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: April 4, 2006
    Assignee: Analog Devices, Inc.
    Inventors: Ramesh Singh, Eamonn Byrne, Asif Ahmad, Srikanth Nittala, Shubha Govindachar