Abstract: A measurement device including: an ion-sensitive element; a reference electrode disposed in a state in which a measurement subject is interposed between the reference electrode and the ion-sensitive element; and a controller configured to: establish a first state at a predetermined interval, the first state being a state in which a current flows at the ion-sensitive element, and establish a second state within each period after the first state has been established and before the first state is next established, the second state being a state in which a potential difference between the ion-sensitive element and the reference electrode is greater than a potential difference between the ion-sensitive element and the reference electrode in the first state.

Abstract: There is provided a measurement device including: a first electrode and a second electrode that are configured to form an energization path via a measurement object at a front side and measure an electrical conductivity of the measurement object; and a reference electrode and an ISFET that are configured to measure a pH value of the measurement object, wherein a standard electrode of the reference electrode is disposed at a rear side of the first electrode and the second electrode.

Abstract: A measurement device including: an ion-sensitive element; a reference electrode disposed in a state in which a measurement subject is interposed between the reference electrode and the ion-sensitive element; and a controller configured to: establish a first state at a predetermined interval, the first state being a state in which a current flows at the ion-sensitive element, and establish a second state within each period after the first state has been established and before the first state is next established, the second state being a state in which a potential difference between the ion-sensitive element and the reference electrode is greater than a potential difference between the ion-sensitive element and the reference electrode in the first state.

Abstract: There is provided a measurement device including: a first electrode and a second electrode that are configured to form an energization path via a measurement object at a front side and measure an electrical conductivity of the measurement object; and a reference electrode and an ISFET that are configured to measure a pH value of the measurement object, wherein a standard electrode of the reference electrode is disposed at a rear side of the first electrode and the second electrode.

Abstract: A transmission unit loads transmission data on a first register and outputs it to a transfer line and starts counting the transmission clock signals in a strobe generation counter according to a transmission clock signal. When the counted value reaches a set value, a strobe signal is output. A reception unit loads the transfer data onto a second register according to a reception clock signal. An edge detection unit generates a valid signal with a pulse width corresponding to one cycle of the reception clock signal when the strobe signal is detected. A third register loads the data that is output from the second register, and outputs it as reception data according to the reception clock signal when the valid signal is supplied.

Abstract: A mixed-voltage interface transfers signals serially between a pair of circuit blocks operating at different voltage levels in a semiconductor integrated circuit. Control, address, and data signals are multiplexed onto a common signal line. The number of necessary signal lines is thereby greatly reduced, as compared with parallel signal transfer, and a separate electrostatic discharge protection circuit can be provided for each signal line without the need to devote excessive space to protection circuitry.

Abstract: An interrupt signal EMG is put out to a microprocessor 10 when a thermal monitor 40 detects that a package temperature exceeds a reference. The microprocessor then increases a frequency division value N stored in a frequency division value register 31 of a clock mechanism 30. An inputted clock signal MCK is divided by N to generate a system clock signal SCK. Therefore, the frequency of system clock signal SCK decreases when N increases. Consequently, electricity consumption of each function module 20i decreases and the package temperature is reduced.

Abstract: A mixed-voltage interface transfers signals serially between a pair of circuit blocks operating at different voltage levels in a semiconductor integrated circuit. Control, address, and data signals are multiplexed onto a common signal line. The number of necessary signal lines is thereby greatly reduced, as compared with parallel signal transfer, and a separate electrostatic discharge protection circuit can be provided for each signal line without the need to devote excessive space to protection circuitry.

Abstract: A transmission unit loads transmission data on a first register and outputs it to a transfer line and starts counting the transmission clock signals in a strobe generation counter according to a transmission clock signal. When the counted value reaches a set value, a strobe signal is output. A reception unit loads the transfer data onto a second register according to a reception clock signal. An edge detection unit generates a valid signal with a pulse width corresponding to one cycle of the reception clock signal when the strobe signal is detected. A third register loads the data that is output from the second register, and outputs it as reception data according to the reception clock signal when the valid signal is supplied.

Abstract: A correlation value calculating device which has a small scale of circuitry, and allows template vectors to be rewritten. One template vector is written to one row of DRAM memory cells. One memory cell pair is used for storing one template vector component. A high-level is written to one memory cell and a low-level is written to the other memory cell according to the value of the template vector component. When calculating a correlation value, one memory cell of each memory cell pair is respectively connected to corresponding bit line according to the corresponding input vector component. If the components of both vectors are matched, the memory cell of the high-level is connected to the bit line, and if both vectors are not matched, the memory cell of the low-level is connected to the bit line. The electric potential of bit lines each become to indicate the correlation value.

Abstract: An interrupt signal EMG is put out to microprocessor 10 when package temp. is detected by thermal monitor 40 that it exceeded reference temp. Thus, rewriting of frequency division value N of freq.div.val.register 31 in clock gear mec. 30 to increase it is performed by microprocessor 10. In frequency division circuit 32, inputted clock signal MCK is divided into 1/N by freq.div.value N set in freq.div.val.register 31, so as to generate system clock signal SCK. Therefore, frequency of system clock signal SCK decreases with the increase of freq.div.value N. Consequently, electricity consumption of each module 20i decreases, increase of package temp. is restrained, and malfunction from overheat can be prevented.

Abstract: A correlation value calculating device which has a small scale of circuitry, and allows template vectors to be rewritten. One template vector is written to one row of DRAM memory cells. One memory cell pair is used for storing one template vector component. A high-level is written to one memory cell and a low-level is written to the other memory cell according to the value of the template vector component. When calculating a correlation value, one memory cell of each memory cell pair is respectively connected to corresponding bit line according to the corresponding input vector component. If the components of both vectors are matched, the memory cell of the high-level is connected to the bit line, and if both vectors are not matched, the memory cell of the low-level is connected to the bit line. The electric potential of bit lines each become to indicate the correlation value.

Abstract: In an amplifier having an input terminal to which input data is supplied and an output terminal from which output data corresponding to the input data is output, the input and output terminals are disposed between a power supply node to which a power supply is applied and a reference voltage node to which a reference voltage is applied. The output terminal and the reference voltage node are connected to each other and the input terminal and the output terminal are disconnected from each other, before the input data is supplied to the input terminal. The output terminal and the reference voltage node are disconnected from each other and the input terminal and the output terminal are connected to each other, after the input data is supplied to the input terminal.

Abstract: A semiconductor device that enables a reduction in power consumption and a stable operation, and which can be manufactured easily and with a high level of integration.In an invention exemplifying the present application, a sense circuit constituting a DRAM comprises a bit line pre-charge circuit, a pre-amplifier circuit PSA100 and a main amplifier circuit MSA100. The pre-amplifier circuit is provide with a switch circuit and an amplifier circuit. The switch circuit comprises a switch element provided between input/output terminals and a pre-sense node, and a switch element provided between input/output terminals and another pre-sense node. The amplifier circuit comprises MOS transistors and switch elements.

Abstract: A method of arranging components in a semiconductor device on a substrate (11), comprising provisionally determining a wiring path (3) so that a predetermined wiring capacitance is not exceeded in a specific network (1) and then performing a wiring process of elements (12) in the specific network within a component placement region (2) determined by the wiring path.