Patents by Inventor Atsuhiko Suda

Atsuhiko Suda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9735068
    Abstract: A method of manufacturing a semiconductor device includes receiving film thickness distribution data of a polished first insulating film of a substrate; calculating processing data for reducing a difference between a film thickness at a center side of the substrate and a film thickness at a periphery side of the substrate, based on the film thickness distribution data; loading the substrate into a process chamber; supplying a process gas to the substrate; and correcting a film thickness of the first insulating film based on the processing data by activating the process gas so that a concentration of active species of the process gas generated at the center side of the substrate differs from a concentration of active species of the process gas generated at the periphery side of the substrate.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: August 15, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Naofumi Ohashi, Masanori Nakayama, Atsuhiko Suda, Kazuyuki Toyoda, Shun Matsui
  • Patent number: 9666494
    Abstract: The present disclosure provides a technique capable of suppressing a deviation in a characteristic of a semiconductor device. There is provided a technique includes: (a) receiving data representing a thickness distribution of a polished silicon-containing layer on a substrate comprising a convex structure whereon the polished silicon-containing layer is formed; (b) calculating, based on the data, a process data for reducing a difference between a thickness of a portion of the polished silicon-containing layer formed at a center portion of the substrate and that of the polished silicon-containing layer formed at a peripheral portion of the substrate; (c) loading the substrate into a process chamber; (d) supplying a process gas to the substrate; and (e) compensating for the difference based on the process data by activating the process gas with a magnetic field having a predetermined strength on the substrate.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: May 30, 2017
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Atsuhiko Suda, Kazuyuki Toyoda, Toshiyuki Kikuchi
  • Publication number: 20170040232
    Abstract: A technique is provided in which a deviation of a characteristic of a semiconductor device is suppressed from occurring. The technique includes a method of a manufacturing a semiconductor device, including: (a) polishing a first silicon-containing layer formed on a substrate including a convex structure; (b) obtaining a data representing a height distribution of a surface of the first silicon-containing layer after performing the step (a); (c) determining a process condition; and (d) supplying a process gas to form a second silicon-containing layer wherein the process gas is activated such that a concentration of an active species of the process gas at a center portion of the substrate differs from a concentration of an active species at a peripheral portion of the substrate to adjust heights of surfaces of a laminated film according to the process condition.
    Type: Application
    Filed: August 5, 2016
    Publication date: February 9, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Masanori NAKAYAMA, Toshiyuki KIKUCHI, Atsuhiko SUDA, Kazuyuki TOYODA, Shun MATSUI
  • Publication number: 20160293498
    Abstract: The present disclosure provides a technique capable of suppressing a deviation in a characteristic of a semiconductor device. There is provided a technique includes: (a) receiving data representing a thickness distribution of a polished silicon-containing layer on a substrate comprising a convex structure whereon the polished silicon-containing layer is formed; (b) calculating, based on the data, a process data for reducing a difference between a thickness of a portion of the polished silicon-containing layer formed at a center portion of the substrate and that of the polished silicon-containing layer formed at a peripheral portion of the substrate; (c) loading the substrate into a process chamber; (d) supplying a process gas to the substrate; and (e) compensating for the difference based on the process data by activating the process gas with a magnetic field having a predetermined strength on the substrate.
    Type: Application
    Filed: December 21, 2015
    Publication date: October 6, 2016
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsuhiko SUDA, Kazuyuki TOYODA, Toshiyuki KIKUCHI
  • Publication number: 20160293500
    Abstract: A method of manufacturing a semiconductor device includes receiving film thickness distribution data of a polished first insulating film of a substrate; calculating processing data for reducing a difference between a film thickness at a center side of the substrate and a film thickness at a periphery side of the substrate, based on the film thickness distribution data; loading the substrate into a process chamber; supplying a process gas to the substrate; and correcting a film thickness of the first insulating film based on the processing data by activating the process gas so that a concentration of active species of the process gas generated at the center side of the substrate differs from a concentration of active species of the process gas generated at the periphery side of the substrate.
    Type: Application
    Filed: February 4, 2016
    Publication date: October 6, 2016
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Naofumi OHASHI, Masanori NAKAYAMA, Atsuhiko SUDA, Kazuyuki TOYODA, Shun MATSUI
  • Patent number: 9431220
    Abstract: A substrate processing apparatus may include a process chamber configured to accommodate a substrate having a metal film polished on a first insulating film and a second insulating film polished on the metal film; a process gas supply part configured to supply a process gas to the substrate; an activation part configured to activate the process gas; a computation part configured to compute processing data for adjusting a film thickness distribution of a stacked insulating film having the polished second insulating film and a third insulating film by adjusting a film thickness distribution of the third insulating film based on the film thickness distribution data of the polished second insulating film; and a control part configured to control the process gas supply part and the activation part to adjust the film thickness distribution of the stacked insulating film based on the processing data.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: August 30, 2016
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Naofumi Ohashi, Masanori Nakayama, Atsuhiko Suda, Kazuyuki Toyoda, Shun Matsui
  • Patent number: 9355866
    Abstract: Provided is a configuration capable of suppressing a variation in characteristics of transistor. The configuration includes: a process chamber; a gas supply unit configured to supply a hard mask forming gas into the process chamber; a substrate support table configured to support a substrate Wn of an nth lot having a film to be etched formed thereon; a heater embedded in the substrate support table; and a controller configured to control a temperature distribution of the heater based on an etching information of a substrate Wm of an mth lot processed prior to the nth lot.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: May 31, 2016
    Assignee: Hitachi Kokusai Elecetric, Inc.
    Inventors: Atsuhiko Suda, Satoshi Shimamoto, Naofumi Ohashi
  • Publication number: 20160093512
    Abstract: Provided is a configuration capable of suppressing a variation in characteristics of transistor. The configuration includes: a process chamber; a gas supply unit configured to supply a hard mask forming gas into the process chamber; a substrate support table configured to support a substrate Wn of an nth lot having a film to be etched formed thereon; a heater embedded in the substrate support table; and a controller configured to control a temperature distribution of the heater based on an etching information of a substrate Wm of an mth lot processed prior to the nth lot.
    Type: Application
    Filed: March 26, 2015
    Publication date: March 31, 2016
    Inventors: Atsuhiko SUDA, Satoshi SHIMAMOTO, Naofumi OHASHI
  • Patent number: 8641829
    Abstract: Disclosed is a substrate processing system, including: a processing chamber to process a substrate; a vaporizing unit to vaporize a material of liquid; a supply system to supply the processing chamber with gas of the material vaporized by the vaporizing unit; an exhaust system to exhaust an atmosphere in the processing chamber; and a cleaning liquid supply system to supply the vaporizing unit with cleaning liquid for cleaning a product deposited in the vaporizing unit, wherein the cleaning liquid supply system supplies at least two kinds of cleaning liquids into the vaporizing unit so that the product can be removed from the vaporizing unit by action of the two kinds of cleaning liquids on the product.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: February 4, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Tomoki Horita, Kazuhiro Hirahara, Hironobu Miya, Atsuhiko Suda, Hirohisa Yamazaki
  • Publication number: 20130298947
    Abstract: Disclosed is a substrate processing system, including: a processing chamber to process a substrate; a vaporizing unit to vaporize a material of liquid; a supply system to supply the processing chamber with gas of the material vaporized by the vaporizing unit; an exhaust system to exhaust an atmosphere in the processing chamber; and a cleaning liquid supply system to supply the vaporizing unit with cleaning liquid for cleaning a product deposited in the vaporizing unit, wherein the cleaning liquid supply system supplies at least two kinds of cleaning liquids into the vaporizing unit so that the product can be removed from the vaporizing unit by action of the two kinds of cleaning liquids on the product.
    Type: Application
    Filed: July 15, 2013
    Publication date: November 14, 2013
    Inventors: Tomoki HORITA, Kazuhiro Hirahara, Hironobu Miya, Atsuhiko Suda, Hirohisa Yamazaki
  • Patent number: 8506714
    Abstract: Disclosed is a substrate processing system, including: a processing chamber to process a substrate; a vaporizing unit to vaporize a material of liquid; a supply system to supply the processing chamber with gas of the material vaporized by the vaporizing unit; an exhaust system to exhaust an atmosphere in the processing chamber; and a cleaning liquid supply system to supply the vaporizing unit with cleaning liquid for cleaning a product deposited in the vaporizing unit, wherein the cleaning liquid supply system supplies at least two kinds of cleaning liquids into the vaporizing unit so that the product can be removed from the vaporizing unit by action of the two kinds of cleaning liquids on the product.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: August 13, 2013
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Tomoki Horita, Kazuhiro Hirahara, Hironobu Miya, Atsuhiko Suda, Hirohisa Yamazaki
  • Patent number: 8240271
    Abstract: To provide a substrate processing apparatus capable of easily installing a plasma discharge electrode having flexibility at a prescribed position in an electrode protective tube, and is capable of holing the plasma discharge electrode having flexibility at the prescribed position. This apparatus includes: a processing chamber that houses a plurality of substrates, with a space provided from each other in a state of being stacked; a gas supply unit that supplies a desired gas into the processing chamber; an exhaust unit that exhausts an atmosphere in the processing chamber; electrodes having flexibility that extend in a stacking direction of the substrates; a protective tube that contains each electrode; a first fitting member fixed to the tip end of each electrode; and a second fitting member disposed in a tip end part of each protective tube, the electrode being contained in the protective tube, with the first fitting member and the second fitting member connected to each other.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: August 14, 2012
    Assignee: Hitachi Kokusai Electric Inc.
    Inventor: Atsuhiko Suda
  • Patent number: 7981815
    Abstract: Disclosed is a producing method or a semiconductor device including: loading at least one substrate into a processing chamber; forming a metal oxide film or a silicon oxide film on a surface of the substrate by repeatedly supplying a metal compound or a silicon compound, each of which is a first material, an oxide material which is a second material including an oxygen atom, and a hydride material which is a third material, into the processing chamber predetermined times; and unloading the substrate from the processing chamber.
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: July 19, 2011
    Assignees: Hitachi Kokusai Electric Inc., Shin-Etsu Chemical Co., Ltd.
    Inventors: Hironobu Miya, Kazuhiro Hirahara, Yoshitaka Hamada, Atsuhiko Suda
  • Publication number: 20100186774
    Abstract: Provided is a cleaning method for removing a film adhered inside a processing chamber of a substrate processing apparatus used for forming a desired film on a substrate by supplying a material gas for film formation. The method is provided with a step of supplying a halogen containing gas into the processing chamber, and a step of supplying a fluorine containing gas into the processing chamber while supplying the halogen containing gas, after starting to supply the halogen containing gas. In the step of supplying the fluorine containing gas, a supply flow volume ratio of the halogen containing gas to the entire gas supplied into the processing chamber is within a range of 20-25%.
    Type: Application
    Filed: September 9, 2008
    Publication date: July 29, 2010
    Inventors: Hironobu Miya, Yuji Takebayashi, Masanori Sakai, Shinya Sasaki, Hirohisa Yamazaki, Atsuhiko Suda, Takashi Tanioka
  • Publication number: 20090120365
    Abstract: To provide a substrate processing apparatus capable of easily installing a plasma discharge electrode having flexibility at a prescribed position in an electrode protective tube, and is capable of holing the plasma discharge electrode having flexibility at the prescribed position. This apparatus includes: a processing chamber that houses a plurality of substrates, with a space provided from each other in a state of being stacked; a gas supply unit that supplies a desired gas into the processing chamber; an exhaust unit that exhausts an atmosphere in the processing chamber; electrodes having flexibility that extend in a stacking direction of the substrates; a protective tube that contains each electrode; a first fitting member fixed to the tip end of each electrode; and a second fitting member disposed in a tip end part of each protective tube, the electrode being contained in the protective tube, with the first fitting member and the second fitting member connected to each other.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 14, 2009
    Applicant: Hitachi Kokusai Electric Inc.
    Inventor: Atsuhiko Suda
  • Publication number: 20090071505
    Abstract: Provided is a cleaning method which can efficiently remove a film, such as a high dielectric constant oxide film, which is difficult to be etched by a fluorine-containing gas alone. As a cleaning method of a substrate processing apparatus which forms a desired film on a wafer by supplying a source gas, there is provided a cleaning method for removing a film attached to the inside of a processing chamber. The cleaning method includes: a step of supplying a halogen-containing gas into the processing chamber; and a step of supplying a fluorine-containing gas into the processing chamber, after starting the supply of the halogen-containing gas, wherein, in the step of supplying the fluorine-containing gas, the fluorine-containing gas is supplied while supplying the halogen-containing gas into the processing chamber.
    Type: Application
    Filed: August 8, 2008
    Publication date: March 19, 2009
    Inventors: Hironobu Miya, Yuji Takebayashi, Masanori Sakai, Shinya Sasaki, Hirohisa Yamazaki, Atsuhiko Suda
  • Publication number: 20090053906
    Abstract: Disclosed is a producing method of a semiconductor device including: loading at least one substrate into a processing chamber; forming a metal oxide film or a silicon oxide film on a surface of the substrate by repeatedly supplying a metal compound or a silicon compound, each of which is a first material, an oxide material which is a second material including an oxygen atom, and a hydride material which is a third material, into the processing chamber predetermined times; and unloading the substrate from the processing chamber.
    Type: Application
    Filed: July 19, 2007
    Publication date: February 26, 2009
    Inventors: Hironobu Miya, Kazuhiro Hirahara, Yoshitaka Hamada, Atsuhiko Suda
  • Publication number: 20060090849
    Abstract: A substrate processing apparatus comprises a substrate transfer section, a plurality of modules and a first substrate transfer robot provided in the substrate transfer section and capable of transferring substrates to the plurality of modules. The plurality of modules are piled up, separately from one another, in a vertical direction. Each of the plurality of modules are detachably mounted to the substrate transfer section and includes a substrate processing chamber, an intermediate chamber, a first gate valve disposed between the substrate processing chamber and the intermediate chamber, a second gate valve disposed between the intermediate chamber and the substrate transfer section, and a second substrate transfer robot disposed in the intermediate chamber.
    Type: Application
    Filed: December 5, 2005
    Publication date: May 4, 2006
    Inventors: Kazuyuki Toyoda, Atsuhiko Suda, Issei Makiguchi, Tsutomu Tanaka, Sadayuki Suzuki, Shinichi Nomura, Mitsunori Takeshita
  • Patent number: 6053980
    Abstract: A substrate processing apparatus comprises a substrate transfer section, connection modules attached to the substrate transfer section, and a first substrate transfer robot in the substrate transfer section capable of transferring substrates to the connection modules. The connection module comprises a substrate processing chamber, first and second intermediate chambers between the substrate processing chamber and the substrate transfer section. The second intermediate chamber is provided with a first substrate holder, the substrate processing chamber is provided with a second substrate holder, and the first intermediate chamber is provided with a substrate transfer device capable of mounting a plurality of the substrates held being stacked in the vertical direction by the first substrate holder, onto the second substrate holder such that the substrates are arranged side by side in the horizontal direction.
    Type: Grant
    Filed: September 4, 1997
    Date of Patent: April 25, 2000
    Assignee: Kokusai Electric Co., Ltd.
    Inventors: Atsuhiko Suda, Kazuyuki Toyoda, Issei Makiguchi, Makoto Ozawa
  • Patent number: 5772770
    Abstract: A plasma CVD apparatus comprises an outer chamber having an exhaust hole, an inner chamber disposed in the outer chamber, a reactive gas inlet pipe communicating with the inner chamber, a first exhaust pipe disposed so as to communicate with the inner chamber, the first exhaust pipe extending at least to an inner wall surface of the outer chamber, and a second exhaust pipe communicating with the exhaust hole. Preferably the forward end of the first exhaust pipe is inserted into the exhaust hole, the forward end of the first exhaust pipe projects outward beyond the inner wall surface of the outer chamber, and a spacing is formed between the first exhaust pipe and the exhaust hole. The reactive gases flow into the inner chamber through the reactive gas inlet pipe and directly flow out of the outer chamber through the first exhaust pipe, thereby preventing the reactive gases from flowing into the outer chamber.
    Type: Grant
    Filed: January 25, 1996
    Date of Patent: June 30, 1998
    Assignee: Kokusai Electric Co, Ltd.
    Inventors: Atsuhiko Suda, Satohiro Okayama