Patents by Inventor Atsuko Kubota

Atsuko Kubota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240097658
    Abstract: A semiconductor device includes a first pad, a second pad, a first output driver provided for the first pad and configured to output a first transmission signal to the first pad, a second output driver provided for the second pad and configured to output a second transmission signal to the second pad, a register that stores first and second calibration values, a first reference resistor for the first pad and having a resistance value that is set according to the first calibration value, a second reference resistor for the second pad and having a resistance value that is set according to the second calibration value, a first setting circuit configured to calibrate a resistance value of the first output driver using the first reference resistor, and a second setting circuit configured to calibrate a resistance value of the second output driver using the second reference resistor.
    Type: Application
    Filed: March 3, 2023
    Publication date: March 21, 2024
    Inventors: Fumiya WATANABE, Toshifumi WATANABE, Kazuhiko SATOU, Shouichi OZAKI, Kenro KUBOTA, Atsuko SAEKI, Ryota TSUCHIYA, Harumi ABE
  • Publication number: 20240079067
    Abstract: A semiconductor memory device includes an output pin configured for connection with a memory controller, an output circuit configured to output through the output pin a voltage signal that changes over time in accordance with one or more bits of data to be output to the memory controller, and a control circuit configured to temporarily change a drive capability of the output circuit each time a voltage signal corresponding to one bit of the data is output through the output pin.
    Type: Application
    Filed: February 28, 2023
    Publication date: March 7, 2024
    Inventors: Shouichi OZAKI, Kazuhiko SATOU, Kenro KUBOTA, Fumiya WATANABE, Atsuko SAEKI, Ryota TSUCHIYA, Harumi ABE, Toshifumi WATANABE
  • Patent number: 10569626
    Abstract: A deflector device for a vehicle sunroof is provided. The deflector device includes: a cloth deflector net which is extended to be blown by a drive airflow during operation period and folded to be housed during non-operation period; a lower holder which holds a lower end side of the deflector net; an upper holder which holds an upper end side of the deflector net and is movable in a vertical direction; an urging member which urges the upper holder upward; and a defining portion which defines an upper limit position of the upper holder against an urging force caused by the urging member so that loosing occurs on at least a part of the deflector net.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: February 25, 2020
    Assignees: YACHIYO INDUSTRY CO., LTD., HONDA MOTOR CO., LTD.
    Inventors: Ryota Yasui, Toshiaki Kuroi, Atsuko Kubota, Makoto Kurita, Shoichi Yokoyama
  • Publication number: 20190016200
    Abstract: A deflector device for a vehicle sunroof is provided. The deflector device includes: a cloth deflector net which is extended to be blown by a drive airflow during operation period and folded to be housed during non-operation period; a lower holder which holds a lower end side of the deflector net; an upper holder which holds an upper end side of the deflector net and is movable in a vertical direction; an urging member which urges the upper holder upward; and a defining portion which defines an upper limit position of the upper holder against an urging force caused by the urging member so that loosing occurs on at least a part of the deflector net.
    Type: Application
    Filed: August 24, 2017
    Publication date: January 17, 2019
    Inventors: Ryota Yasui, Toshiaki Kuroi, Atsuko Kubota, Makoto Kurita, Shoichi YOKOYAMA
  • Patent number: 5738942
    Abstract: Provided is a process for producing a semiconductor silicon wafer by which an intrinsic gettering effect can be improved and at the same time the top side can be made free from faults. A silicon ingot is produced and sliced to obtain silicon wafers. Then, a polycrystal silicon depositing film is formed on one side of a silicon wafer, which is subjected to a heat treatment in an inert gas, a reducing gas or a mixture thereof to discharge oxygen from the vicinity of the other side. Alternatively, after discharging oxygen from the silicon wafer by a heat treatment, a polycrystal silicon depositing film may be formed on one side of the silicon wafer.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: April 14, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsuko Kubota, Masakatu Kojima, Norihiko Tsuchiya, Shuichi Samata, Masanori Numano, Yoshihiro Ueno
  • Patent number: 5534294
    Abstract: Provided is a process for producing a semiconductor silicon wafer by which an intrinsic gettering effect can be improved and at the same time the top side can be made free from faults. A silicon ingot is produced and sliced to obtain silicon wafers. Then, a polycrystal silicon depositing film is formed on one side of a silicon wafer, which is subjected to a heat treatment in an inert gas, a reducing gas or a mixture thereof to discharge oxygen from the vicinity of the other side. Alternatively, after discharging oxygen from the silicon wafer by a heat treatment, a polycrystal silicon depositing film may be formed on one side of the silicon wafer.
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: July 9, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsuko Kubota, Masakatu Kojima, Norihiko Tsuchiya, Shuichi Samata, Masanori Numano, Yoshihiro Ueno
  • Patent number: 5508800
    Abstract: There are provided a method of inspecting and evaluating semiconductor substrates, good quality semiconductor substrates, a method of manufacturing good quality semiconductor substrates, and a method of manufacturing semiconductor devices using good quality semiconductor substrates.A semiconductor substrate is processed with aqueous basic solution. In this process, the substrate is dipped in the aqueous solution or exposed to a vapor of the aqueous solution. With this process, the surface of the substrate is selectively etched. The substrate surface after the etching process is radiated with a laser beam to measure a light scattered point density. The quality of the substrate can be judged in accordance with the measured density. A thermal treatment may be carried out before or after processing the substrate with the aqueous basic solution. The thermal treatment considerably changes the fine defect density on the surface of the substrate.
    Type: Grant
    Filed: March 16, 1993
    Date of Patent: April 16, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Moriya Miyashita, Hachiro Hiratsuka, Atsuko Kubota, Shuichi Samata, Masanori Numano, Hiroyuki Fukui
  • Patent number: 5148457
    Abstract: A system for analyzing a metal impurity at the surface of a single crystal semiconductor comprising: an incident device for allowing X-ray to be incident, at an incident angle less than a total reflection angle, onto the surface of a wafer in the form of a thin plate comprised of a single crystal semiconductor (e.g., silicon); a wafer fixing/positioning stage wherein when it is assumed that the wafer surface is partitioned by a lattice having an interval d, and that the wavelength of the X-ray from the incident device is .lambda., an angle that the X-ray and the wafer surface form is .theta., and an arbitrary integer is n, the stage is adapted to fix the crystal orientation of the wafer so as to satisfy the condition of "2d sin .theta..noteq.n.lambda.
    Type: Grant
    Filed: June 27, 1991
    Date of Patent: September 15, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsuko Kubota, Norihiko Tsuchiya, Shuichi Samata, Yoshiaki Matsushita, Mokuji Kageyama
  • Patent number: 5071776
    Abstract: First, silicon wafers are formed by cutting silicon monocrystalline ingot into slices. Then back side and main surfaces of the wafers are subjected to lapping and etching processes. Next, the wafers are submerged into substantially pure water and ultrasonic waves are applied to the wafer surface via the water to clean at least one of the surfaces of each of the wafers and form gettering damage on the wafer surface. After this, the main surfaces of the wafers which have been subjected to the cleaning and damage-forming process and on which semiconductor elements are to be formed are polished into mirror finish.
    Type: Grant
    Filed: November 25, 1988
    Date of Patent: December 10, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiaki Matsushita, Moriya Miyashita, Makiko Wakatsuki, Norihiko Tsuchiya, Atsuko Kubota
  • Patent number: 4862000
    Abstract: In a method for predicting a density of micro crystal defects to be generated in a semiconductor element, an infrared absorption spectrum associated with a silicon wafer, which is used for the manufacture of the semiconductor element, is formed by a spectrum forming system. The spectrum has a first oxygen absorption peak at the wavenumber range of 1150 to 1050 cm.sup.-1 and a second oxygen absorption peak at 530 to 500 cm.sup.-1. First and second coefficients indicating oxygen concentrations at the first and second peaks are read by a reading unit. The density of the micro crystal defects are predicted by using a ratio of the first and second coefficients as a monitor.
    Type: Grant
    Filed: February 17, 1987
    Date of Patent: August 29, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsuko Kubota, Yoshiaki Matsushita, Yoshiaki Ohwada