Patents by Inventor Atsuo Kitazawa

Atsuo Kitazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6110285
    Abstract: A vertical wafer boat in which a ceramic film is prevented from being peeled off and which has a long useful life is provided. Front and rear sets each consisting of two support rods 4 which are bilaterally symmetrically arranged are respectively disposed in front and rear sides between upper and lower plates 1 and 2. A number of wafer mount groove portions 3 are formed in the support rods. The plates and the support rods are made of a ceramic base material, and the surfaces are covered by a high-purity ceramic film. At least wafer mount groove portions of front right and left support rods of the front set are located in front of a center line which is perpendicular to an insertion direction of semiconductor wafers which are to be mounted on the wafer mount groove portions. Horizontal sections of the wafer mount groove portions of the support rods have a polygonal shape which does not have an acute angle of 90.degree. or less.
    Type: Grant
    Filed: April 15, 1998
    Date of Patent: August 29, 2000
    Assignee: Toshiba Ceramics Co., Ltd.
    Inventors: Atsuo Kitazawa, Hiroyuki Homma, Shuichi Takeda
  • Patent number: 6093644
    Abstract: The invention is aimed at reducing the influence of the pollution from impurities in the wafer to improve the wafer yield on the basis of prevention of the pollution from impurities while occurrence of slip lines in the wafer is minimized to enhance the efficiency of the surface treatment of the wafer loading faces of the vertical wafer board. For example, the surface of the jig for semiconductor wafers which is composed of the substrate of a high purity carbon is formed with a SiC film by the CVD method, said surface being ground by a grinding tool again formed of a SiC film. Hangover particles produced by said grinding operation are subjected to a high temperature oxydizing treatment to be dissolved thereafter. Application of this method to the vertical wafer board realizes that when n times of measurements are conducted for a length of Lmm in the range of L.times.n.gtoreq.100 mm to obtain a result that said SiC film has a maximum surface roughness Rmax. which is maintained constantly below 10 .mu.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: July 25, 2000
    Assignee: Toshiba Ceramics Co., Ltd.
    Inventors: Takeshi Inaba, Atsuo Kitazawa
  • Patent number: 5492229
    Abstract: A vertical boat for holding a plurality of semiconductor wafers comprising two end members (2) positioned at the top and the bottom of the vertical boat, and a plurality of support members (3,4,5,6,104) vertically mounted on the end members (2) for supporting the wafers, wherein each support member (3,4,5,6,104) is formed by a plate-like member having a series of slits (9,10,7,8,108) formed thereon in such a manner that a plurality of support arms are defined by the slits (9,10,7,8,108) at a predetermined interval, each support arm having a support projection (11,12,13,14,112) formed at the end thereof, and wherein the inner portions (P) of the wafer (1) is to be supported by the support projections (11,12,13,14,112) whereas the periphery of the wafer (1) does not contact the arms of the support members (3,4,5,6,104).
    Type: Grant
    Filed: November 12, 1993
    Date of Patent: February 20, 1996
    Assignee: Toshiba Ceramics Co., Ltd.
    Inventors: Takashi Tanaka, Jun Yoshikawa, Eiichi Toya, Atsuo Kitazawa, Kazunori Meguro, Tatsuo Nozawa, Yutaka Ishizuka, Yoshiyuki Watanabe, Masaru Seino, Hideo Nakanishi