Patents by Inventor Atsushi Ikari
Atsushi Ikari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080268613Abstract: Hetero-semiconductor structures possessing an SOI structure containing a silicon-germanium mixed crystal are produced at a low cost and high productivity. The semiconductor substrates comprise a first layer formed of silicon having germanium added thereto, a second layer formed of an oxide and adjoined to the first layer, and a third layer derived from the same source as the first layer, but having an enriched content of germanium as a result of thermal oxidation and thinning of the third layer.Type: ApplicationFiled: May 14, 2008Publication date: October 30, 2008Applicant: Siltronic AGInventors: Josef Brunner, Hiroyuki Deai, Atsushi Ikari, Martin Grassl, Atsuki Matsumura, Wilfried von Ammon
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Publication number: 20080096371Abstract: The Czochralski method is used for producing p?-doped and epitaxially coated semiconductor wafers from silicon, wherein a silicon single crystal is pulled, and during the pulling is doped with boron, hydrogen and nitrogen, and the single crystal thus obtained is processed to form p?-doped semiconductor wafers which are epitaxially coated.Type: ApplicationFiled: October 11, 2007Publication date: April 24, 2008Applicant: SILTRONIC AGInventors: Wilfried von Ammon, Katsuhiko Nakai, Martin Weber, Herbert Schmidt, Atsushi Ikari
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Patent number: 7208043Abstract: A silicon semiconductor substrate has a structure possessing oxygen precipitate defects fated to form gettering sites in a high density directly below the defect-free region of void type crystals. The silicon semiconductor substrate is formed by heat-treating a silicon semiconductor substrate derived from a silicon single crystal grown by the Czochralski method or the magnetic field-applied Czochralski method and characterized by satisfying the relational expression (Oi DZ)?(COP DZ)?10 ?m wherein Oi DZ denotes a defect-free zone of oxygen precipitate crystal defects and COP DZ denotes a region devoid of a void type defect measuring not less than 0.11 ?m in size, and having not less than 5×108 oxygen precipitate crystal defects per cm3.Type: GrantFiled: September 6, 2002Date of Patent: April 24, 2007Assignee: Siltronic AGInventors: Akiyoshi Tachikawa, Atsushi Ikari
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Patent number: 7204887Abstract: The present invention provides a wafer holder, a wafer support member, a wafer boat and a heat treatment furnace, which are capable of sufficiently suppressing slip dislocations, without lowering productivity and at low cost, in the high temperature heat treatment of silicon wafers, and said wafer holder is characterized in that: the wafer holder is composed of a wafer support plate and three or more wafer support members mounted on said wafer support plate, each of the wafer support members having a wafer support portion or more; at least one of said wafer support members is a tilting wafer support member which has a plurality of upward-convex wafer support portions on the upper surface and is tiltable with respect to said wafer support plate; and the wafer is supported by at least four wafer support portions.Type: GrantFiled: October 16, 2001Date of Patent: April 17, 2007Assignee: Nippon Steel CorporationInventors: Keisuke Kawamura, Tsutomu Sasaki, Atsuki Matsumura, Atsushi Ikari, Isao Hamaguchi, Yoshiharu Inoue, Koki Tanaka, Shunichi Hayashi
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Publication number: 20050139961Abstract: Hetero-semiconductor structures possessing an SOI structure containing a silicon-germanium mixed crystal are produced at a low cost and high productivity. The semiconductor substrates comprise a first layer formed of silicon having germanium added thereto, a second layer formed of an oxide and adjoined to the first layer, and a third layer derived from the same source as the first layer, but having an enriched content of germanium as a result of thermal oxidation and thinning of the third layer.Type: ApplicationFiled: December 15, 2004Publication date: June 30, 2005Applicant: Siltronic AGInventors: Josef Brunner, Hiroyuki Deai, Atsushi Ikari, Martin Grassl, Atsuki Matsumura, Wilfried Ammon
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Patent number: 6805742Abstract: A semiconductor substrate after heat-treatment in a non-oxidising atmosphere has the characteristics that the depth of the denuded zone may be greater than 12 &mgr;m or the defect-free depth of the void type defect is greater than 12 &mgr;m and the substrate has a locally densified portion produced by nitrogen segregation and exhibiting a signal strength two or more times the average signal strength at the depth of 12 &mgr;m or more below the surface thereof when measuring the concentration of nitrogen by using secondary ion mass-spectroscopy, and the density of the crystal defect of oxygen precipitates is 5×108/cm3 or more, and the said substrate is produced by heat-treating for at least one hour at the temperature of 1200° C. or more in a non-oxidising atmosphere.Type: GrantFiled: August 7, 2002Date of Patent: October 19, 2004Assignee: Siltronic AGInventors: Akiyoshi Tachikawa, Kazunori Ishisaka, Atsushi Ikari
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Patent number: 6617034Abstract: A SOI substrate of high quality which allows LSI to be formed thereon in an improved yield and realizes excellent electric properties and a method for the production thereof are provided. The SOI substrate is obtained by forming an embedded oxide layer on a silicon single crystal substrate and forming a SOI layer for the formation of a device on the embedded oxide layer and is characterized by the SOI layer containing pit-like defects at a density of not more than 5 cm−2 or the embedded oxide layer containing pinhole defects at a density of less than one piece/cm2.Type: GrantFiled: August 1, 2000Date of Patent: September 9, 2003Assignee: Nippon Steel CorporationInventors: Isao Hamaguchi, Atsushi Ikari, Atsuki Matsumura, Keisuke Kawamura, Takayuki Yano, Yoichi Nagatake
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Publication number: 20030079674Abstract: A semiconductor substrate after heat-treatment in a non-oxidising atmosphere has the characteristics that the depth of the denuded zone may be greater than 12 &mgr;m or the defect-free depth of the void type defect is greater than 12 &mgr;m and the substrate has a locally densified portion produced by nitrogen segregation and exhibiting a signal strength two or more times the average signal strength at the depth of 12 &mgr;m or more below the surface thereof when measuring the concentration of nitrogen by using secondary ion mass-spectroscopy, and the density of the crystal defect of oxygen precipitates is 5×108/cm3 or more, and the said substrate is produced by heat-treating for at least one hour at the temperature of 1200° C. or more in a non-oxidising atmosphere.Type: ApplicationFiled: August 7, 2002Publication date: May 1, 2003Applicant: Wacker Siltronic Gesellschaft Fur Halbleitermaterialien AGInventors: Akiyoshi Tachikawa, Kazunori Ishisaka, Atsushi Ikari
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Patent number: 6548886Abstract: A silicon semiconductor substrate is obtained by deriving a silicon semiconductor substrate from a silicon single crystal grown by the Czochralski method from a molten silicon containing not less than 1×1016 atoms/cm3 and not more than 1.5×1019 atoms/cm3 of nitrogen and heat-treating the silicon semiconductor substrate at a temperature of not less than 1000° C. and not more than 1300° C. for not less than one hour and is characterized by the fact that the density of crystal defects measuring not less than 0.1 &mgr;m as reduced to diameter is not more than 104 pieces/cm3 at least in the region reaching a depth of 1 &mgr;m from the surface of the substrate and the nitrogen content at the center of thickness of the silicon semiconductor substrate is not less than 1×1013 atoms/cm3 and not more than 1×1016 atoms/cm3.Type: GrantFiled: March 10, 2000Date of Patent: April 15, 2003Assignee: Wacker NSCE CorporationInventors: Atsushi Ikari, Masami Hasebe, Katsuhiko Nakai, Hikaru Sakamoto, Wataru Ohashi, Taizo Hoshino, Toshio Iwasaki
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Publication number: 20030056715Abstract: A silicon semiconductor substrate has a structure possessing oxygen precipitate defects fated to form gettering sites in a high density directly below the defect-free region of void type crystals. The silicon semiconductor substrate is formed by heat-treating a silicon semiconductor substrate derived from a silicon single crystal grown by the Czochralski method or the magnetic field-applied Czochralski method and characterized by satisfying the relational expression (Oi DZ)−(COP DZ)≦10 &mgr;m wherein Oi DZ denotes a defect-free zone of oxygen precipitate crystal defects and COP DZ denotes a region devoid of a void type defect measuring not less than 0.11 &mgr;m in size, and having not less than 5×108 oxygen precipitate crystal defects per cm3.Type: ApplicationFiled: September 6, 2002Publication date: March 27, 2003Applicant: Wacker Siltronic Gesellschaft Fur Halbleitermaterialien AGInventors: Akiyoshi Tachikawa, Atsushi Ikari
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Publication number: 20030029570Abstract: The present invention provides a wafer holder, a wafer support member, a wafer boat and a heat treatment furnace, which are capable of sufficiently suppressing slip dislocations, without lowering productivity and at low cost, in the high temperature heat treatment of silicon wafers, and said wafer holder is characterized in that: the wafer holder is composed of a wafer support plate and three or more wafer support members mounted on said wafer support plate, each of the wafer support members having a wafer support portion or more; at least one of said wafer support members is a tilting wafer support member which has a plurality of upward-convex wafer support portions on the upper surface and is tiltable with respect to said wafer support plate; and the wafer is supported by at least four wafer support portions.Type: ApplicationFiled: June 14, 2002Publication date: February 13, 2003Inventors: Keisuke Kawamura, Tsutomu Sasaki, Atsuki Matsumura, Atsushi Ikari, Isao Hamaguchi, Yoshiharu Inoue, Koki Tanaka, Shunichi Hayashi
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Patent number: 6080237Abstract: This invention is directed to a method for the production of a dislocation-free silicon single crystal by the Czochralski method. This method attains growth of the main body part of the dislocation-free silicon single crystal by immersing a seed crystal in a melt of silicon and then pulling the seed crystal without recourse to the necking. The seed crystal thus used is a dislocation-free silicon single crystal. The horizontal maximum length of the part of the seed crystal being immersed in the melt at the time of completing the immersion of the seed crystal in the melt is not less than 5 mm. The immersing rate of the seed crystal in the melt is not more than 2.8 mm/min and the part of the seed crystal to be immersed in the melt is a crystal as grown.Type: GrantFiled: June 8, 1998Date of Patent: June 27, 2000Assignees: Nippon Steel Corporation, NSC Electron CorporationInventors: Toshio Iwasaki, Shin-ichi Fujimoto, Hiroshi Isomura, Takayoshi Ishida, Michiharu Tamura, Atsushi Ikari
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Patent number: 5704974Abstract: When a Si single crystal 8 is pulled up from a melt 6 received in a crucible 2, the state of eddy flows generated in the melt 6 is judged from the temperature distribution of the melt at the surface. According to the result of judgement, the gas, i.e. N.sub.2, Xe or Kr, which causes extraoridnary deviation in the density of a melt 6 is added to an atmospheric gas, so as to keep the eddy flows under unstabilized condition. The effect of said gas is typical in the case of crystal growth from the melt to which a dopant such as Ca, Sb, Al, As or In having the effect to suppress the extraordinary deviation in the density is added. Since the single crystal is pulled up from the melt held in the temperature-controlled condition at the surface, impurity distribution and oxygen distribution are made uniform along the direction of crystal growth. A single crystal obtained in this way has highly-stabilized quality.Type: GrantFiled: March 22, 1996Date of Patent: January 6, 1998Assignees: Research Development Corporation of Japan, Sumitomo Sitix Corporation, Toshiba Ceramics Co., Ltd., Nippon Steel Corporation, Komatsu Electronic Metals Co., Ltd., Mitsubishi Materials CorporationInventors: Koji Izunome, Souroku Kawanishi, Shinji Togawa, Atsushi Ikari, Hitoshi Sasaki, Shigeyuki Kimura
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Patent number: 5700320Abstract: When a B or P-doped Si single crystal is pulled up from a B or P-doped melt by the Czochralski method, an element such as Ga, Sb or In having the effect to reduce the heat expansion coefficient of said melt at a temperature near the melting point is added to said melt. The additive element stabilizes the temperature condition of crystal growth so as to control the generation of eddy flows just below the interface of crystal growth.When a Ga or Sb-doped Si single crystal is pulled up from a Ga or Sb-doped melt, an element such as B or P having the effect to increase the heat expansion coefficient of said melt at a temperature near the melting point is added. The agitation of the melt just below the interface of crystal growth is accelerated by the addition of B or P, so as to assure the growth of a Si single crystal from the melt having impurity distribution made uniform along the radial direction.Type: GrantFiled: March 22, 1996Date of Patent: December 23, 1997Assignees: Research Development Corporation of Japan, Sumitomo Sitix Corporation, Toshiba Ceramics Co., Ltd., Nippon Steel Corporation, Komatsu Electronic Metals Co., Ltd., Mitsubishi Materials CorporationInventors: Koji Izunome, Souroku Kawanishi, Shinji Togawa, Atsushi Ikari, Hitoshi Sasaki, Shigeyuki Kimura
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Patent number: 5683504Abstract: When a single crystal is pulled up from a melt, the difference .DELTA.T between temperatures at the bottom of a crucible and at the interface of crystal growth is controlled so as to hold the Rayleigh constant defined by the formula of:R a=g.multidot..beta..multidot..DELTA.T.multidot.L/.kappa..multidot..nu.within the range of 5.times.10.sup.5 -4.times.10.sup.7, wherein g represents the acceleration of gravity, .beta. the volumetric expansion coefficient of the melt, L the depth of the melt, .kappa. thermal diffusivity and .nu. the kinematic viscocity. Since the convection mode of the melt at the interface of crystal growth is constantly held in the region of soft turbulence, a single crystal is grown under the stabilized temperature condition without the transfer of the impurity distribution in the melt into the growing single crystal.Type: GrantFiled: March 22, 1996Date of Patent: November 4, 1997Assignees: Research Development Corporation of Japan, Sumitomo Sitix Corporation, Toshiba Ceramics Co., Ltd., Nippon Steel Corporation, Komatsu Electronic Metals Co., Ltd., Mitsubishi Materials CorporationInventors: Koji Izunome, Souroku Kawanishi, Shinji Togawa, Atsushi Ikari, Hitoshi Sasaki, Shigeyuki Kimura