Patents by Inventor Atsushi Miyaguchi
Atsushi Miyaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11635809Abstract: An input system and an electronic apparatus with novel structures are provided. An electronic apparatus whose setting can be changed even when both hands are full is provided. An input system and an electronic apparatus including an imaging device having a function of taking an image of eyes and a detection device having a function of detecting a change of the shape of the eyes from data obtained by the imaging device are provided. Settings are changed in accordance with the change of the shape of the eyes. The settings are changed by a different method from a manual method and the change of the settings can be reflected in display.Type: GrantFiled: August 19, 2021Date of Patent: April 25, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Atsushi Miyaguchi
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Publication number: 20230112113Abstract: A novel storage device is provided. The storage device includes a first wiring, a second wiring, and a first memory cell. The first memory cell includes a first transistor and a first magnetic tunnel junction device. One of a source or a drain of the first transistor is electrically connected to a first wiring. The other of the source or the drain of the first transistor is electrically connected to one terminal of the first magnetic tunnel junction device. Another terminal of the first magnetic tunnel junction device is electrically connected to the second wiring. The first transistor includes an oxide semiconductor in its channel formation region.Type: ApplicationFiled: December 14, 2022Publication date: April 13, 2023Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshiaki OIKAWA, Atsushi MIYAGUCHI, Hideki UOCHI
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Publication number: 20230093414Abstract: An e-book reader in which destruction of a driver circuit at the time when a flexible panel is handled is inhibited. In addition, an e-book reader having a simplified structure. A plurality of flexible display panels each including a display portion in which display control is performed by a scan line driver circuit and a signal line driver circuit, and a binding portion fastening the plurality of display panels together are included. The signal line driver circuit is provided inside the binding portion, and the scan line driver circuit is provided at the edge of the display panel in a direction perpendicular to the binding portion.Type: ApplicationFiled: November 23, 2022Publication date: March 23, 2023Applicant: Semiconductor Energy Laboratory Co., LidInventors: Shunpei Yamazaki, Jun KOYAMA, Yasuyuki ARAI, Ikuko KAWAMATA, Atsushi MIYAGUCHI, Yoshitaka MORIYA
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Patent number: 11598982Abstract: The display device includes: a flexible display panel including a display portion in which scanning lines and signal lines cross each other; a supporting portion for supporting an end portion of the flexible display panel; a signal line driver circuit for outputting a signal to the signal line, which is provided for the supporting portion; and a scanning line driver circuit for outputting a signal to the scanning line, which is provided for a flexible surface of the display panel in a direction which is perpendicular or substantially perpendicular to the supporting portion.Type: GrantFiled: June 11, 2021Date of Patent: March 7, 2023Inventors: Satohiro Okamoto, Yasuyuki Arai, Ikuko Kawamata, Atsushi Miyaguchi, Yoshitaka Moriya
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Publication number: 20230022694Abstract: To provide a display device including a flexible panel that can be handled without seriously damaging a driver circuit or a connecting portion between circuits. The display device includes a bent portion obtained by bending an element substrate. A circuit for driving the display device is provided in the bent portion and a wiring extends from the circuit, whereby the strength of a portion including the circuit for driving the display device is increased and failure of the circuit is reduced. Furthermore, the element substrate is bent in a connecting portion between an external terminal electrode and an external connecting wiring (FPC) so that the element substrate provided with the external terminal electrode fits the external connecting wiring, whereby the strength of the connecting portion is increased.Type: ApplicationFiled: October 6, 2022Publication date: January 26, 2023Inventor: Atsushi MIYAGUCHI
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Patent number: 11532340Abstract: A novel storage device is provided. The storage device includes a first wiring, a second wiring, and a first memory cell. The first memory cell includes a first transistor and a first magnetic tunnel junction device. One of a source or a drain of the first transistor is electrically connected to a first wiring. The other of the source or the drain of the first transistor is electrically connected to one terminal of the first magnetic tunnel junction device. Another terminal of the first magnetic tunnel junction device is electrically connected to the second wiring. The first transistor includes an oxide semiconductor in its channel formation region.Type: GrantFiled: May 21, 2021Date of Patent: December 20, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiaki Oikawa, Atsushi Miyaguchi, Hideki Uochi
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Publication number: 20220384433Abstract: A semiconductor device having a novel structure is provided. The semiconductor device includes a p-channel transistor and an n-channel transistor provided over a silicon substrate. One of a source and a drain of the p-channel transistor is electrically connected to a first power supply line, one of a source and a drain of the n-channel transistor is electrically connected to a second power supply line, and the other of the source and the drain of the p-channel transistor is connected to the other of the source and the drain of the n-channel transistor. The p-channel transistor includes a first gate electrode and a first back gate electrode provided to face the first gate electrode with a first channel formation region therebetween. The first back gate electrode is formed using a region where an impurity element imparting conductivity is selectively introduced to the silicon substrate. The n-channel transistor is provided above a layer including the p-channel transistor.Type: ApplicationFiled: October 20, 2020Publication date: December 1, 2022Inventors: Takahiko ISHIZU, Takayuki IKEDA, Atsushi MIYAGUCHI, Shunpei YAMAZAKI
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Patent number: 11513562Abstract: An e-book reader in which destruction of a driver circuit at the time when a flexible panel is handled is inhibited. In addition, an e-book reader having a simplified structure. A plurality of flexible display panels each including a display portion in which display control is performed by a scan line driver circuit and a signal line driver circuit, and a binding portion fastening the plurality of display panels together are included. The signal line driver circuit is provided inside the binding portion, and the scan line driver circuit is provided at the edge of the display panel in a direction perpendicular to the binding portion.Type: GrantFiled: January 4, 2021Date of Patent: November 29, 2022Inventors: Shunpei Yamazaki, Jun Koyama, Yasuyuki Arai, Ikuko Kawamata, Atsushi Miyaguchi, Yoshitaka Moriya
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Patent number: 11476280Abstract: To provide a display device including a flexible panel that can be handled without seriously damaging a driver circuit or a connecting portion between circuits. The display device includes a bent portion obtained by bending an element substrate. A circuit for driving the display device is provided in the bent portion and a wiring extends from the circuit, whereby the strength of a portion including the circuit for driving the display device is increased and failure of the circuit is reduced. Furthermore, the element substrate is bent in a connecting portion between an external terminal electrode and an external connecting wiring (FPC) so that the element substrate provided with the external terminal electrode fits the external connecting wiring, whereby the strength of the connecting portion is increased.Type: GrantFiled: May 14, 2021Date of Patent: October 18, 2022Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Atsushi Miyaguchi
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Publication number: 20220301614Abstract: A semiconductor device that enables lower power consumption and data storage imitating a human brain is provided. The semiconductor device includes a control unit, a memory unit, and a sensor unit. The memory unit includes a memory circuit and a switching circuit. The memory circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer including a channel formation region with an oxide semiconductor, and a back gate electrode. The control unit has a function of switching a signal supplied to the back gate electrode, in accordance with a signal obtained at the sensor unit.Type: ApplicationFiled: June 9, 2022Publication date: September 22, 2022Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Atsushi MIYAGUCHI, Yoshiaki OIKAWA
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Publication number: 20220293159Abstract: A semiconductor device in which a memory region at each level of a memory device can be changed is provided. The semiconductor device includes a memory device including a first and a second memory circuit and a control circuit. The first memory circuit includes a first capacitor and a first transistor which has a function of holding charges held in the first capacitor. The second memory circuit includes a second transistor, a second capacitor which is electrically connected to a gate of the second transistor, and a third transistor which has a function of holding charges held in the second capacitor. The first and the third transistors each have a semiconductor layer including an oxide semiconductor, a gate, and a back gate. The voltage applied to the back gate of the first or the third transistor is adjusted, whereby the memory region of each of the first and the second memory circuit is changed.Type: ApplicationFiled: June 1, 2022Publication date: September 15, 2022Inventors: Shunpei YAMAZAKI, Kiyoshi KATO, Hajime KIMURA, Atsushi MIYAGUCHI, Tatsunori INOUE
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Patent number: 11361807Abstract: A semiconductor device that enables lower power consumption and data storage imitating a human brain is provided. The semiconductor device includes a control unit, a memory unit, and a sensor unit. The memory unit includes a memory circuit and a switching circuit. The memory circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer including a channel formation region with an oxide semiconductor, and a back gate electrode. The control unit has a function of switching a signal supplied to the back gate electrode, in accordance with a signal obtained at the sensor unit.Type: GrantFiled: May 31, 2019Date of Patent: June 14, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hajime Kimura, Atsushi Miyaguchi, Yoshiaki Oikawa
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Patent number: 11356089Abstract: Provided is a semiconductor device with a novel structure in which the power consumption can be reduced. The semiconductor device includes a sensor, a sample-and-hold circuit to which a sensor signal of the sensor is input, an analog-digital converter circuit to which an output signal of the sample-and-hold circuit is input, a control circuit, a battery, and an antenna.Type: GrantFiled: September 17, 2019Date of Patent: June 7, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Seiichi Yoneda, Atsushi Miyaguchi, Tatsunori Inoue
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Patent number: 11355176Abstract: A semiconductor device in which a memory region at each level of a memory device can be changed is provided. The semiconductor device includes a memory device including a first and a second memory circuit and a control circuit. The first memory circuit includes a first capacitor and a first transistor which has a function of holding charges held in the first capacitor. The second memory circuit includes a second transistor, a second capacitor which is electrically connected to a gate of the second transistor, and a third transistor which has a function of holding charges held in the second capacitor. The first and the third transistors each have a semiconductor layer including an oxide semiconductor, a gate, and a back gate. The voltage applied to the back gate of the first or the third transistor is adjusted, whereby the memory region of each of the first and the second memory circuit is changed.Type: GrantFiled: April 22, 2019Date of Patent: June 7, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kiyoshi Kato, Hajime Kimura, Atsushi Miyaguchi, Tatsunori Inoue
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Publication number: 20220164641Abstract: An arithmetic device and an electronic device having small power consumption is provided. An arithmetic device and an electronic device capable of high-speed operation is provided. An arithmetic device and an electronic device capable of suppressing heat generation is provided. The arithmetic device includes a first arithmetic portion and a second arithmetic portion. The first arithmetic portion includes a first CPU core and a second CPU core. The second arithmetic portion includes a first GPU core and a second GPU core. The CPU cores each have a power gating function and each include a first data retention circuit electrically connected to a flip-flop. The first GPU core includes a second data retention circuit capable of retaining an analog value and reading out the analog value as digital data of two or more bits. The second GPU core includes a third data retention circuit capable of retaining a digital value and reading out the digital value as digital data of one bit.Type: ApplicationFiled: January 31, 2022Publication date: May 26, 2022Inventors: Takahiko ISHIZU, Takayuki IKEDA, Atsuo ISOBE, Atsushi MIYAGUCHI, Shunpei YAMAZAKI
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Publication number: 20220115435Abstract: To improve color reproduction areas in a display device having light-emitting elements. A display region has a plurality of picture elements. Each picture element includes: first and second pixels each including a light-emitting element which has a chromaticity whose x-coordinate in a CIE-XY chromaticity diagram is 0.50 or more; third and fourth pixels each including a light-emitting element which has a chromaticity whose y-coordinate in the diagram is 0.55 or more; and fifth and sixth pixels each including a light-emitting element which has a chromaticity whose x-coordinate and y-coordinate in the diagram are 0.20 or less and 0.25 or less, respectively. The light-emitting elements in the first and second pixels have different emission spectrums from each other; the light-emitting elements in the third and fourth pixels have different emission spectrums from each other; and the light-emitting elements in the fifth and sixth pixels have different emission spectrums from each other.Type: ApplicationFiled: December 20, 2021Publication date: April 14, 2022Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hajime Kimura, Atsushi Miyaguchi
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Patent number: 11275993Abstract: An arithmetic device and an electronic device having small power consumption is provided. An arithmetic device and an electronic device capable of high-speed operation is provided. An arithmetic device and an electronic device capable of suppressing heat generation is provided. The arithmetic device includes a first arithmetic portion and a second arithmetic portion. The first arithmetic portion includes a first CPU core and a second CPU core. The second arithmetic portion includes a first GPU core and a second GPU core. The CPU cores each have a power gating function and each include a first data retention circuit electrically connected to a flip-flop. The first GPU core includes a second data retention circuit capable of retaining an analog value and reading out the analog value as digital data of two or more bits. The second GPU core includes a third data retention circuit capable of retaining a digital value and reading out the digital value as digital data of one bit.Type: GrantFiled: August 28, 2018Date of Patent: March 15, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takahiko Ishizu, Takayuki Ikeda, Atsuo Isobe, Atsushi Miyaguchi, Shunpei Yamazaki
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Publication number: 20220043512Abstract: An input system and an electronic apparatus with novel structures are provided. An electronic apparatus whose setting can be changed even when both hands are full is provided. An input system and an electronic apparatus including an imaging device having a function of taking an image of eyes and a detection device having a function of detecting a change of the shape of the eyes from data obtained by the imaging device are provided. Settings are changed in accordance with the change of the shape of the eyes. The settings are changed by a different method from a manual method and the change of the settings can be reflected in display.Type: ApplicationFiled: August 19, 2021Publication date: February 10, 2022Inventor: Atsushi MIYAGUCHI
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Publication number: 20220020683Abstract: A semiconductor device having a novel structure is provided. The semiconductor device includes a silicon substrate and a device provided above the silicon substrate. The device includes a transistor and a conductor. The transistor includes a metal oxide in a channel formation region. Conductivity is imparted to the silicon substrate. The conductor is electrically connected to each of a drain of the transistor and the silicon substrate through an opening provided in the device. Heat of the drain of the transistor can be efficiently released through the silicon substrate.Type: ApplicationFiled: November 20, 2019Publication date: January 20, 2022Inventors: Akio SUZUKI, Atsushi MIYAGUCHI, Shunpei YAMAZAKI
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Publication number: 20220011357Abstract: The present invention provides a radio field intensity measurement device having a display portion with improved visibility, in the case of measuring a weak radiowave from a long distance. In the radio field intensity measurement device, a battery is provided as a power source for power supply and the battery is charged by a received radiowave. When a potential of a signal obtained from the received radiowave is higher than an output potential of the battery, the power is stored in the battery. On the other hand, when the potential of the signal obtained from the received radiowave is lower than the output potential of the battery, power produced by the battery is used as power to drive the radio field intensity measurement device. As an element to display the radio field intensity, a thermochromic element or an electrochromic element is used.Type: ApplicationFiled: July 12, 2021Publication date: January 13, 2022Inventors: Hiroki DEMBO, Atsushi MIYAGUCHI