Abstract: A regulator circuit includes a first transistor reducing an external supply voltage and outputting an internal active voltage to an output node; a first detector receiving a criteria level, detecting the internal active voltage based on an enable signal, controlling a gate voltage of the first transistor, and adjusting an output current thereof; a second transistor reducing the external supply voltage, and outputting an internal standby voltage corresponding to the internal active voltage to the output node; a second detector receiving a reference voltage, detecting the internal standby voltage regardless of the enable signal, controlling a gate voltage of the second transistor, and adjusting an output current thereof; a first switch controlling whether to output the reference voltage as the criteria level of the first detector; and a second switch controlling whether to output the voltage of the output node as the criteria level of the first detector.

Abstract: A regulator circuit includes a first transistor reducing an external supply voltage and outputting an internal active voltage to an output node; a first detector receiving a criteria level, detecting the internal active voltage based on an enable signal, controlling a gate voltage of the first transistor, and adjusting an output current thereof; a second transistor reducing the external supply voltage, and outputting an internal standby voltage corresponding to the internal active voltage to the output node; a second detector receiving a reference voltage, detecting the internal standby voltage regardless of the enable signal, controlling a gate voltage of the second transistor, and adjusting an output current thereof; a first switch controlling whether to output the reference voltage as the criteria level of the first detector; and a second switch controlling whether to output the voltage of the output node as the criteria level of the first detector.

Abstract: A semiconductor device includes a booster circuit and a detector. The booster circuit is configured to boost an input voltage and output an output voltage, and the detector is configured to output the output voltage, which is output from the booster circuit, and control the booster circuit to generate a plurality of different voltages in accordance with an operating mode.

Abstract: A booster circuit includes a first capacitor and a second capacitor serially coupled between a first node and a second node through a third node; a third capacitor and a fourth capacitor serially coupled between a fourth node and a fifth node through a sixth node; a first switch coupling the third node with a power supply line when the fourth node is set to a first level; a second switch coupling the sixth node with the power supply line when the first node is set to the first level; a third switch transferring a plurality of electric charges of the sixth node to the second node; a fourth switch transferring a plurality of electric charges of the third node to the fifth node; a fifth switch coupling the second node with a voltage line; and a sixth switch coupling the fifth node with the voltage line.

Abstract: A semiconductor device is provides which includes: a first boost circuit that generates a first boost voltage by boosting an external voltage and supplies the first boost voltage to an internal circuit; and a first circuit that supplies the external voltage to an output of the first boost circuit when power is turned on and supplies the first boost voltage to the output of the first boost circuit when the external voltage reaches a given voltage.

Abstract: An internal circuit has a plurality of circuit blocks operating by receiving an internal power supply voltage. An internal voltage control circuit generates a plurality of regulator control signals according to a combination of operating circuit blocks. A plurality of regulators operate in response to activation of the regulator control signals respectively to generate the internal power supply voltage by using an external power supply voltage. For example, as the number of the operating circuit blocks increases, the number of the operating regulators increases. By thus generating the regulator control signals according to the actual operation of the internal circuit to control the operations of the regulators, it is possible to reduce variation in the internal power supply voltage to a minimum. As a result, an operating margin of a semiconductor integrated circuit can be improved and a yield of the semiconductor integrated circuit can be improved.

Abstract: A semiconductor memory includes: a voltage supply circuit which supplies a first voltage to a word line when an internal circuit is in a standby state, and supplies a second voltage higher than the first voltage to the word line when the internal circuit is in an active state; and a control circuit changes a drive capacity of the voltage supply circuit when changing from the standby state to the active state and the second voltage is supplied to the word line.

Abstract: A semiconductor device includes a booster circuit and a detector. The booster circuit is configured to boost an input voltage and output an output voltage, and the detector is configured to output the output voltage, which is output from the booster circuit, and control the booster circuit to generate a plurality of different voltages in accordance with an operating mode.

Abstract: A booster circuit includes a first capacitor and a second capacitor serially coupled between a first node and a second node through a third node; a third capacitor and a fourth capacitor serially coupled between a fourth node and a fifth node through a sixth node; a first switch coupling the third node with a power supply line when the fourth node is set to a first level; a second switch coupling the sixth node with the power supply line when the first node is set to the first level; a third switch transferring a plurality of electric charges of the sixth node to the second node; a fourth switch transferring a plurality of electric charges of the third node to the fifth node; a fifth switch coupling the second node with a voltage line; and a sixth switch coupling the fifth node with the voltage line.

Abstract: A semiconductor memory includes: a voltage supply circuit which supplies a first voltage to a word line when an internal circuit is in a standby state, and supplies a second voltage higher than the first voltage to the word line when the internal circuit is in an active state; and a control circuit changes a drive capacity of the voltage supply circuit when changing from the standby state to the active state and the second voltage is supplied to the word line.

Abstract: A semiconductor device is provides which includes: a first boost circuit that generates a first boost voltage by boosting an external voltage and supplies the first boost voltage to an internal circuit; and a first circuit that supplies the external voltage to an output of the first boost circuit when power is turned on and supplies the first boost voltage to the output of the first boost circuit when the external voltage reaches a given voltage.

Abstract: An internal circuit has a plurality of circuit blocks operating by receiving an internal power supply voltage. An internal voltage control circuit generates a plurality of regulator control signals according to a combination of operating circuit blocks. A plurality of regulators operate in response to activation of the regulator control signals respectively to generate the internal power supply voltage by using an external power supply voltage. For example, as the number of the operating circuit blocks increases, the number of the operating regulators increases. By thus generating the regulator control signals according to the actual operation of the internal circuit to control the operations of the regulators, it is possible to reduce variation in the internal power supply voltage to a minimum. As a result, an operating margin of a semiconductor integrated circuit can be improved and a yield of the semiconductor integrated circuit can be improved.