Abstract: A variable-reactance circuit comprising an amplifying section, a first differential section and a second differential section. The amplifying section has first to third bipolar transistors. These transistors are driven by three constant-current sources, respectively. The first differential section receives an output signal of the amplifying section. The first differential section has fourth and fifth bipolar transistors, which are driven by a first variable-current source. The second differential section receives the output signal of the amplifying section. The second differential section has sixth and seventh bipolar transistors, which are driven by a second variable-current source. The output currents of the first and second variable-current sources are controlled by two control signals, respectively.

Abstract: A compatible quadrature type AM sterophobic decoder including an enveolpe detector for providing a current output signal and a combination of a VCA and a synchronous detector for providing a current output signal.The combination of the VCA and the synchronous detector is controlled by a feedback signal from an adder which adds the current output signal of the envelope detector and the inverting current output signal of the conbination of the VCA and the synchronous detector.

Abstract: A low driving voltage operation logic circuit responsive to a power source voltage applied between a pair of power source terminals for modifying an input signal according to a predetermined logic pattern. The logic circuit includes an input control circuit having a plurality of input transistors for generating a pair of control signals, each having a level opposite to the other, in response to the input signal and a differential circuit having a plurality of paired transistors for dividing the frequency of the control signals, the input transistors each having an emitter area substantially larger than the emitter area of each paired transistor and the logic circuit including only a single base to emitter junction corresponding to each input transistor between the power source terminals.