Patents by Inventor Atsuya Yamamoto

Atsuya Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11976618
    Abstract: A fixed core generates a magnetic attraction force with energization of a coil. A movable core has an attracted surface facing an attracting surface of the fixed core is attracted to the fixed core to cause the valve body to open a nozzle hole. A stopper member abuts against the movable core to restrict movement of the movable core. The movable core has an abutment portion that abuts against the stopper member, and a core body portion in which the attracted surface is formed. The attracting surface and the attracted surface extend annularly around an axis line of the fixed core, are formed so as to be separated from each other in an axis line direction in a state where the abutment portion abuts against the stopper member, and a separation distance from each other increases toward a radially outer side.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: May 7, 2024
    Assignee: DENSO CORPORATION
    Inventors: Shinsuke Yamamoto, Yuki Watanabe, Atsuya Okamoto
  • Patent number: 9570544
    Abstract: A semiconductor device includes: a silicon substrate that includes a high-concentration layer containing first conductivity type impurities; a low-concentration layer formed on the high-concentration layer and containing first conductivity type impurities; a first electrode and a second electrode formed on the low-concentration layer; a vertical semiconductor element that allows current to flow between the second electrode and the high-concentration layer; and a first trench unit that realizes electric connection between the first electrode and the high-concentration layer. The first trench unit consists of first polysilicon containing first conductivity type impurities, and a diffusion layer configured to surround the first polysilicon in a plan view and to contain first conductivity type impurities. The first polysilicon is configured to reach the high-concentration layer by penetrating the low-concentration layer.
    Type: Grant
    Filed: December 20, 2015
    Date of Patent: February 14, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Katsushige Yamashita, Kenichi Nishimura, Atsuya Yamamoto, Shigetaka Aoki
  • Publication number: 20160104767
    Abstract: A semiconductor device includes: a silicon substrate that includes a high-concentration layer containing first conductivity type impurities; a low-concentration layer formed on the high-concentration layer and containing first conductivity type impurities; a first electrode and a second electrode formed on the low-concentration layer; a vertical semiconductor element that allows current to flow between the second electrode and the high-concentration layer; and a first trench unit that realizes electric connection between the first electrode and the high-concentration layer. The first trench unit consists of first polysilicon containing first conductivity type impurities, and a diffusion layer configured to surround the first polysilicon in a plan view and to contain first conductivity type impurities. The first polysilicon is configured to reach the high-concentration layer by penetrating the low-concentration layer.
    Type: Application
    Filed: December 20, 2015
    Publication date: April 14, 2016
    Inventors: KATSUSHIGE YAMASHITA, KENICHI NISHIMURA, ATSUYA YAMAMOTO, SHIGETAKA AOKI
  • Patent number: 5245452
    Abstract: An image display device includes thin film transistors and pixel electrodes arranged in matrix form on a substrate. A semiconductor layer forming a channel region of the thin film transistor also serves as the pixel electrode, thereby making the structure of the device simple and facilitating fabrication thereof.
    Type: Grant
    Filed: June 21, 1989
    Date of Patent: September 14, 1993
    Assignee: Matsushita Electronics Corporation
    Inventors: Akira Nakamura, Kohji Senda, Eiji Fujii, Fumiaki Emoto, Yasuhiro Uemoto, Atsuya Yamamoto, Kazunori Kobayashi
  • Patent number: 5105288
    Abstract: A liquid crystal display apparatus in which leakage of light caused by signal lines can be eliminated is disclosed. In the liquid crystal display apparatus, a predetermined potential corresponding to the black level is applied to the video signal lines during a period of time other than the horizontal blanking period, and image signals are transferred to one row of the pixels through the signal lines which the horizontal blanking period.
    Type: Grant
    Filed: October 16, 1990
    Date of Patent: April 14, 1992
    Assignee: Matsushita Electronics Corporation
    Inventors: Koji Senda, Fumiaki Emoto, Eiji Fujii, Atsuya Yamamoto, Akira Nakamura