Patents by Inventor Atul Kumar Jain
Atul Kumar Jain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11991533Abstract: A method for disoriented cell configuration includes determining a first number of misaligned sectors in a first set of disoriented cells of a first set of cells, generating data of a second set of disoriented cells based on the first set of disoriented cells or the first number of misaligned sectors for in the first set of disoriented cells, determining a first set of cross-feeder cells, a first set of sector swap cells or a first set of cyclic swap cells, and changing a configuration of an antenna of a disoriented cell of the second set of disoriented cells. Changing the configuration of the antenna includes changing a connection of a set of cables of an antenna of a first cross-feeder cell, or changing a deployed azimuth of an antenna of a sector in the first set of sector swap cells or cyclic swap cells.Type: GrantFiled: March 31, 2022Date of Patent: May 21, 2024Assignee: RAKUTEN SYMPHONY SINGAPORE PTE. LTD.Inventors: Atul Singh Rajpoot, Sudeep Kumar Jain, Durgesh Rathore, Keshav Sharma
-
Patent number: 11956731Abstract: A booming cell start distance and recommended electronic tilt is identified by retrieving a list of cells served by a first base station. A plurality of grids is generated from the first base station to a predetermined threshold distance. A plurality of selected grids is identified between an acceptable coverage limit and a threshold distance. An evaluation is made regarding whether the first base station is not the dominant cell in each of the selected grids based. The number of grids where the first base station is not the dominant cell site is determined based on a dominant carrier threshold. A column of grids where the first base station is no longer the dominant cell site is determined based on the dominant carrier threshold. A bad booming distance of the cell is determined based on the distance from the first base station and the determined column of grids.Type: GrantFiled: December 28, 2021Date of Patent: April 9, 2024Assignee: RAKUTEN SYMPHONY SINGAPORE PTE. LTD.Inventors: Atul Singh Rajpoot, Sudeep Kumar Jain, Durgesh Rathore, Dharambir Bharti
-
Patent number: 11937175Abstract: A cell range determination is made by determining a sector straddling an azimuth line of a first base station with a center at the coordinates of a first base station. The sector is divided into a plurality of subsectors. A nearest neighbor base station is determined in each of the plurality of subsectors. A set of coordinates is determined for the nearest neighbor base station. An average distance between the nearest neighbor base stations is determined. A bearing angle difference between the nearest neighbor base station and the first base station is determined based on the set of coordinates of the nearest neighbor base station. A gain is determined for each of the plurality of subsectors based on the bearing angle difference. A cell range is determined for the first base station based on the gain.Type: GrantFiled: January 4, 2022Date of Patent: March 19, 2024Assignee: RAKUTEN SYMPHONY SINGAPORE PTE. LTD.Inventors: Atul Singh Rajpoot, Sudeep Kumar Jain, Durgesh Rathore, Dharambir Bharti
-
Patent number: 11935589Abstract: Systems and methods are provided for controlling a wake-up operation of a memory circuit. The memory circuit is configured to precharge the bit lines of a memory array sequentially during wakeup. A sleep signal is received by the first bit line of a memory cell and then a designed delay occurs prior to the precharge of a second complementary bit line. The sleep signal may then precharge the bit lines of a second memory cell with further delay between the precharge of each bit line. The memory circuit is configured to precharge both bit lines of a memory cell at the same time when an operation associated with that cell is designated.Type: GrantFiled: March 23, 2023Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sanjeev Kumar Jain, Ruchin Jain, Arun Achyuthan, Atul Katoch
-
Publication number: 20240087618Abstract: Disclosed herein are related to reducing power consumption of a memory device when transitioning from a sleep state to an operational state. In one aspect, the memory device includes a memory cell to store data. In one aspect, the memory device includes an output driver configured to: generate an output signal indicating the stored data, in response to a sleep tracking signal indicating that the memory cell is in the operational state, and generate the output signal having a predetermined voltage irrespective of the stored data, in response to the sleep tracking signal indicating that the memory cell is in the sleep state. In one aspect, the sleep tracking signal is delayed from a sleep control signal causing the memory cell to operate in the sleep state or the operational state.Type: ApplicationFiled: November 22, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sanjeev Kumar Jain, Atul Katoch
-
Patent number: 11929110Abstract: A memory circuit includes a global control circuit, a first local control circuit, and a first set of word line post-decoder circuits coupled to a first set of memory cells that is configured to store a first set of data. The global control circuit is configured to generate a first and second set of global pre-decoder signals, and a first set of local address signals. The first local control circuit includes a first set of repeater circuits and a first clock pre-decoder circuit. The first set of repeater circuits is configured to generate a first and second set of local pre-decoder signals in response to the corresponding first and second set of global pre-decoder signals. The first clock pre-decoder circuit is configured to generate a first and second set of clock signals in response to the first set of local address signals and the first clock signal.Type: GrantFiled: May 17, 2022Date of Patent: March 12, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Sanjeev Kumar Jain, Ishan Khera, Atul Katoch
-
Patent number: 10218338Abstract: Aperiodic clock generation with clock spur suppression is based on cascaded randomizers, such as for mixed signal devices. A clock generator circuit includes an input node to receive the input periodic clock signal having an input-clock frequency. A first randomizer circuit coupled to receive the input clock signal from the input node, to perform signal randomization to suppress spurious signal content associated with (a) the input clock signal, and (b) the first randomizer circuit, and to generate an intermediate clock signal. A second concatenated randomizer circuit is coupled to receive the intermediate clock signal, to perform signal randomization to suppress spurious signal content associated with (a) the intermediated clock signal, and (b) the second randomizer circuit, and to generate an aperiodic output clock signal having a pre-defined average output-clock frequency that is less than the input-clock frequency. Example randomizers are a delta-sigma divider and a pulse swallower (in any order).Type: GrantFiled: October 12, 2017Date of Patent: February 26, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Nikolaus Klemmer, Chan Fernando, Jaimin Mehta, Srinadh Madhavapeddi, Hamid Safiri, Atul Kumar Jain