Patents by Inventor Atushi Ishikawa
Atushi Ishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10500891Abstract: A mechanical pencil including: a body cylinder; a lead releasing unit configured to release a writing lead and having a rear region supported inside the body cylinder such that a front region thereof is flexurally deformable or tiltable inside the body cylinder; and a stretchable elastic body arranged between the lead releasing unit and a body cylinder, in which the lead releasing unit has a pressed portion on an outer circumferential surface of the front region, the body cylinder has a pressing portion in a front region, the pressing portion and the pressed portion abut on each other before the front region of the lead releasing unit is flexurally deformed or tilted, and the pressing portion causes the pressed portion to relatively move to the rear side with respect to the body cylinder when the front region of the lead releasing unit is flexurally deformed or tilted.Type: GrantFiled: June 24, 2016Date of Patent: December 10, 2019Assignee: KABUSHIKI KAISHA PILOT CORPORATIONInventors: Takumi Kajiwara, Nobukazu Seri, Atushi Ishikawa, Yuji Kawarazaki
-
Publication number: 20180186173Abstract: A mechanical pencil including: a body cylinder; a lead releasing unit configured to release a writing lead and having a rear region supported inside the body cylinder such that a front region thereof is flexurally deformable or tiltable inside the body cylinder; and a stretchable elastic body arranged between the lead releasing unit and a body cylinder, in which the lead releasing unit has a pressed portion on an outer circumferential surface of the front region, the body cylinder has a pressing portion in a front region, the pressing portion and the pressed portion abut on each other before the front region of the lead releasing unit is flexurally deformed or tilted, and the pressing portion causes the pressed portion to relatively move to the rear side with respect to the body cylinder when the front region of the lead releasing unit is flexurally deformed or tilted.Type: ApplicationFiled: June 24, 2016Publication date: July 5, 2018Inventors: Takumi KAJIWARA, Nobukazu SERI, Atushi ISHIKAWA, Yuji KAWARAZAKI
-
Patent number: 8832380Abstract: An object of the present invention is to provide a storage system which is shared by a plurality of application programs, wherein optimum performance tuning for a cache memory can be performed for each of the individual application programs. The storage system of the present invention comprises a storage device which provides a plurality of logical volumes which can be accessed from a plurality of application programs, a controller for controlling input and output of data to and from the logical volumes in response to input/output requests from the plurality of application programs, and a cache memory for temporarily storing data input to and output from the logical volume, wherein the cache memory is logically divided into a plurality of partitions which are exclusively assigned to the plurality of logical volumes respectively.Type: GrantFiled: December 6, 2013Date of Patent: September 9, 2014Assignee: Hitachi, Ltd.Inventors: Atushi Ishikawa, Yuko Matsui
-
Publication number: 20140095793Abstract: An object of the present invention is to provide a storage system which is shared by a plurality of application programs, wherein optimum performance tuning for a cache memory can be performed for each of the individual application programs. The storage system of the present invention comprises a storage device which provides a plurality of logical volumes which can be accessed from a plurality of application programs, a controller for controlling input and output of data to and from the logical volumes in response to input/output requests from the plurality of application programs, and a cache memory for temporarily storing data input to and output from the logical volume, wherein the cache memory is logically divided into a plurality of partitions which are exclusively assigned to the plurality of logical volumes respectively.Type: ApplicationFiled: December 6, 2013Publication date: April 3, 2014Applicant: HITACHI, LTD.Inventors: Atushi ISHIKAWA, Yuko Matsui
-
Patent number: 8612716Abstract: An object of the present invention is to provide a storage system which is shared by a plurality of application programs, wherein optimum performance tuning for a cache memory can be performed for each of the individual application programs. The storage system of the present invention comprises a storage device which provides a plurality of logical volumes which can be accessed from a plurality of application programs, a controller for controlling input and output of data to and from the logical volumes in response to input/output requests from the plurality of application programs, and a cache memory for temporarily storing data input to and output from the logical volume, wherein the cache memory is logically divided into a plurality of partitions which are exclusively assigned to the plurality of logical volumes respectively.Type: GrantFiled: October 26, 2007Date of Patent: December 17, 2013Assignee: Hitachi, Ltd.Inventors: Atushi Ishikawa, Yuko Matsui
-
Patent number: 7447843Abstract: An object of the present invention is to provide a storage system which is shared by a plurality of application programs, wherein optimum performance tuning for a cache memory can be performed for each of the individual application programs. The storage system of the present invention comprises a storage device which provides a plurality of logical volumes which can be accessed from a plurality of application programs, a controller for controlling input and output of data to and from the logical volumes in response to input/output requests from the plurality of application programs, and a cache memory for temporarily storing data input to and output from the logical volume, wherein the cache memory is logically divided into a plurality of partitions which are exclusively assigned to the plurality of logical volumes respectively.Type: GrantFiled: April 21, 2005Date of Patent: November 4, 2008Assignee: Hitachi, Ltd.Inventors: Atushi Ishikawa, Yuko Matsui
-
Publication number: 20080244183Abstract: An object of the present invention is to provide a storage system which is shared by a plurality of application programs, wherein optimum performance tuning for a cache memory can be performed for each of the individual application programs. The storage system of the present invention comprises a storage device which provides a plurality of logical volumes which can be accessed from a plurality of application programs, a controller for controlling input and output of data to and from the logical volumes in response to input/output requests from the plurality of application programs, and a cache memory for temporarily storing data input to and output from the logical volume, wherein the cache memory is logically divided into a plurality of partitions which are exclusively assigned to the plurality of logical volumes respectively.Type: ApplicationFiled: October 26, 2007Publication date: October 2, 2008Inventors: Atushi Ishikawa, Yuko Matsui
-
Publication number: 20060184740Abstract: An object of the present invention is to provide a storage system which is shared by a plurality of application programs, wherein optimum performance tuning for a cache memory can be performed for each of the individual application programs. The storage system of the present invention comprises a storage device which provides a plurality of logical volumes which can be accessed from a plurality of application programs, a controller for controlling input and output of data to and from the logical volumes in response to input/output requests from the plurality of application programs, and a cache memory for temporarily storing data input to and output from the logical volume, wherein the cache memory is logically divided into a plurality of partitions which are exclusively assigned to the plurality of logical volumes respectively.Type: ApplicationFiled: April 21, 2005Publication date: August 17, 2006Inventors: Atushi Ishikawa, Yuko Matsui
-
Publication number: 20060161732Abstract: A journal write unit writes journal data into a third storage device. The journal data includes an identifier of a logical volume in a first storage device into which data has been written, information of a location in which the data is stored in the logical volume, update time which is current time acquired from a timing mechanism, and the data. A second write unit refers to update time of the journal data stored in the third storage device, selects journal data for which a difference between current time acquired from the timing mechanism and the update time is longer than a detection time stored in the third storage device, and writes the data into a place indicated by the location information, in a logical volume in the second storage device in the order of update time in the selected journal data.Type: ApplicationFiled: March 16, 2006Publication date: July 20, 2006Inventors: Akira Murotani, Atushi Ishikawa, Tetsuya Kishimoto
-
Patent number: 5619099Abstract: Support electrodes are provided for individually supporting a plurality of dynodes arranged inside of a vessel of an electron tube, such as photomultiplier tube. A black spacer formed from a ceramic material is disposed between the support electrodes. The black spacers are formed with elemental composition having content of MnO suppressed to 3 wt % or less. Current leaks, which are the cause of dark current, and abnormal generations of light during photomultiplication can be reduced, thereby improving the signal-to-noise ratio of the electron tube.Type: GrantFiled: June 20, 1995Date of Patent: April 8, 1997Assignee: Hamamatsu Photonics K.K.Inventors: Kimitsugu Nakamura, Masayoshi Sahara, Atushi Ishikawa, Chiyoshi Okuyama, Junichi Takeuchi