Patents by Inventor Au Seong Wong

Au Seong Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10879219
    Abstract: Disclosed are embodiments of a lower integrated circuit (IC) package structure for a package-on-package (PoP) assembly. The lower IC package structure includes an interposer having pads to mate with terminals of an upper IC package. An encapsulant material is disposed in the lower IC package, and this encapsulant may be disposed proximate one or more IC die. An upper IC package may be coupled with the lower IC package to form a PoP assembly. Such a PoP assembly may be disposed on a mainboard or other circuit board, and may form part of a computing system. Other embodiments are described and claimed.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: December 29, 2020
    Assignee: Intel Corporation
    Inventors: Shaw Fong Wong, Wei Keat Loh, Kang Eu Ong, Au Seong Wong
  • Publication number: 20180374833
    Abstract: Disclosed are embodiments of a lower integrated circuit (IC) package structure for a package-on-package (PoP) assembly. The lower IC package structure includes an interposer having pads to mate with terminals of an upper IC package. An encapsulant material is disposed in the lower IC package, and this encapsulant may be disposed proximate one or more IC die. An upper IC package may be coupled with the lower IC package to form a PoP assembly. Such a PoP assembly may be disposed on a mainboard or other circuit board, and may form part of a computing system. Other embodiments are described and claimed.
    Type: Application
    Filed: January 3, 2018
    Publication date: December 27, 2018
    Inventors: Shaw Fong Wong, Wei Keat P. Loh, Kang Eu Ong, AU Seong Wong
  • Publication number: 20120159118
    Abstract: Disclosed are embodiments of a lower integrated circuit (IC) package structure for a package-on-package (PoP) assembly. The lower IC package structure includes an interposer having pads to mate with terminals of an upper IC package. An encapsulant material is disposed in the lower IC package, and this encapsulant may be disposed proximate one or more IC die. An upper IC package may be coupled with the lower IC package to form a PoP assembly. Such a PoP assembly may be disposed on a mainboard or other circuit board, and may form part of a computing system. Other embodiments are described and claimed.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 21, 2012
    Inventors: Shaw Fong Wong, Wei Keat Loh, Kang Eu Ong, Au Seong Wong