Abstract: In one embodiment, a system includes a network interface controller including a device interface to connect to a processing device and receive a time synchronization marker message from an application running on the processing device, a network interface to send packets over a network, and packet processing circuitry to process the time synchronization marker message for sending via the network interface over the network to a slave clock device, generate a time synchronization follow-up message including a timestamp indicative of when the synchronization marker message egressed the network interface, and process the time synchronization follow-up message for sending via the network interface over the network to the slave clock device.

Abstract: A classification apparatus includes a memory and a processor. The memory is configured to store rules corresponding to a corpus of rules in respective rule entries, each rule includes a respective set of unmasked bits having corresponding bit values, and at least some of the rules include masked bits. The rules in the corpus conform to respective Rule Patterns (RPs), each RP defining a respective sequence of masked and unmasked bits. The processor is configured to cluster the RPs, using a clustering criterion, into extended Rule Patterns (eRPs) associated with respective hash tables including buckets for storing rule entries. The clustering criterion aims to minimize an overall number of the eRPs while meeting a collision condition that depends on a specified maximal number of rule entries per bucket.

Abstract: A network adapter includes a host interface, a network interface, a memory and packet processing circuitry. The memory holds a shared buffer and multiple queues allocated to the multiple host processors. The packet processing circuitry is configured to receive from the network interface data packets destined to the host processors, to store payloads of at least some of the data packets in the shared buffer, to distribute headers of at least some of the data packets to the queues, to serve the data packets to the host processors by applying scheduling among the queues, to detect congestion in the data packets destined to a given host processor among the host processors, and, in response to the detected congestion, to mitigate the congestion in the data packets destined to the given host processor, while retaining uninterrupted processing of the data packets destined to the other host processors.

Abstract: Methods, systems, and computer program products for selecting packing processing cores are provided. An example system includes a plurality of packet processing cores and a load balancing unit communicatively connected to the plurality of packet processing cores. The load balancing unit is configured to receive a workflow packet including packet description data indicative of at least a packet structure and a packet priority and receive, from the plurality of packet processing cores, state data indicative of at least a utilization state and an operating state of each of the respective packet processing cores. The load balancing unit determines a selected packet processing core from amongst the plurality of packet processing cores based on the state data of the packet processing core and the packet description data of the workflow packet and transmits the workflow packet to the selected packet processing core.

Abstract: A method includes receiving a network packet into a hardware pipeline of a network device; parsing and retrieving information of the network packet; determining, by the hardware pipeline, a packet-processing action to be performed by matching the information to a data structure of a set of flow data structures; sending, by the hardware pipeline, an action request to a programmable core, the action request being populated with data to trigger the programmable core to execute a hardware thread to perform a job, which is associated with the packet-processing action and that generates contextual data; retrieving the contextual data updated by the programmable core; and integrating the contextual data into performing the packet-processing action.

Abstract: A peripheral device coupled to a host includes a network interface, a packet processor, and a Data Processing Unit (DPU). The packet processor receives from a communication network, via the network interface, packets that originated from a source in an original order and received at the peripheral device in as order different from the original order. The packet processor splits the received packets into headers and payloads, sends the payloads for storage in a host memory and sends the headers without the payloads for storage in a DPU memory, and based on the headers produces a hint indicative of processing to be applied to the headers, by the DPU, for identifying the original order. Based on the hint, the DPU identifies the original order of the packets by applying the processing indicated by the hint to respective headers in the DPU memory, and notifies the host of the original order.

Abstract: In one embodiments, data communication system include a communication apparatus, which is configured to receive data from different user equipment devices a schedule of time periods, and packetize the data from respective ones of the user equipment devices for respective ones of the time periods into packets, a memory including a plurality of buffers, and a network interface controller configured to receive the packets from the communication apparatus, and scatter respective portions of the data belonging to respective groups of successive ones of the time periods to the buffers, responsively to a static set of steering rules, and timing information of respective ones of the packets, and wherein each respective portion of the data is scattered to the buffers a same scatter pattern.

Abstract: A classification apparatus includes a memory and a processor. The memory is configured to store rules corresponding to a corpus of rules in respective rule entries, each rule includes a respective set of unmasked bits having corresponding bit values, and at least some of the rules include masked bits. The rules in the corpus conform to respective Rule Patterns (RPs), each RP defining a respective sequence of masked and unmasked bits. The processor is configured to cluster the RPs, using a clustering criterion, into extended Rule Patterns (eRPs) associated with respective hash tables including buckets for storing rule entries. The clustering criterion aims to minimize an overall number of the eRPs while meeting a collision condition that depends on a specified maximal number of rule entries per bucket.

Abstract: A peripheral device coupled to a host includes a network interface, a packet processor, and a Data Processing Unit (DPU). The packet processor receives from a communication network, via the network interface, packets that originated from a source in an original order and received at the peripheral device in as order different from the original order. The packet processor splits the received packets into headers and payloads, sends the payloads for storage in a host memory and sends the headers without the payloads for storage in a DPU memory, and based on the headers produces a hint indicative of processing to be applied to the headers, by the DPU, for identifying the original order. Based on the hint, the DPU identifies the original order of the packets by applying the processing indicated by the hint to respective headers in the DPU memory, and notifies the host of the original order.

Abstract: A network adapter includes a network interface, a host interface and processing circuitry. The network interface is configured to connect to a communication network. The host interface is configured to communicate with a host processor running multiple application programs. The processing circuitry includes one or more bandwidth-control policers, and is configured to receive from the communication network a packet destined to a given application program among the application programs running on the host processor, to associate a bandwidth-control policer with the packet, selected from among the bandwidth-control policers, and to apply the selected bandwidth-control policer to the packet to produce a policer result.

Abstract: A network adapter includes a network interface, a host interface and processing circuitry. The network interface is configured to connect to a communication network. The host interface is configured to communicate with a host processor running multiple application programs. The processing circuitry includes one or more bandwidth-control policers, and is configured to receive from the communication network a packet destined to a given application program among the application programs running on the host processor, to associate a bandwidth-control policer with the packet, selected from among the bandwidth-control policers, and to apply the selected bandwidth-control policer to the packet to produce a policer result.

Abstract: A communication apparatus includes a host interface, connected to a peripheral component bus so as to communicate with a CPU and a memory of a host computer. A network interface is connected to a network. Packet processing circuitry is configured to receive from a first interface a data packet including a set of one or more headers that include header fields having respective values, to identify, responsively to at least one of the header fields, a corresponding entry in a header modification table that specifies a header modification operation, to modify the set of headers in accordance with the header modification operation, to check whether the entry specifies an additional header modification operation, to output the modified set of headers if the entry does not specify an additional header modification operation, and, if the entry specifies an additional header modification operation, to feed-back the modified set of headers.

Abstract: A network element one or more network ports, network time circuitry and packet processing circuitry. The network ports are configured to communicate with a communication network. The network time circuitry is configured to track a network time defined in the communication network. In some embodiments the packet processing circuitry is configured to receive a definition of one or more timeslots that are synchronized to the network time, and to send outbound packets to the communication network depending on the timeslots. In some embodiments the packet processing circuitry is configured to process inbound packets, which are received from the communication network, depending on the timeslots.

Abstract: A network adapter includes a network interface, a host interface and processing circuitry. The network interface is configured to connect to a communication network. The host interface is configured to communicate with a host processor running multiple application programs. The processing circuitry includes one or more bandwidth-control policers, and is configured to receive from the communication network a packet destined to given application program among the application programs running on the host processor, to associate a bandwidth-control policer with the packet, selected from among the bandwidth-control policers, and to apply the selected bandwidth-control policer to the packet to produce a policer result.

Abstract: A communication apparatus includes a host interface, connected to a peripheral component bus so as to communicate with a CPU and a memory of a host computer. A network interface is connected to a network. Packet processing circuitry is configured to receive from a first interface a data packet including a set of one or more headers that include header fields having respective values, to identify, responsively to at least one of the header fields, a corresponding entry in a header modification table that specifies a header modification operation, to modify the set of headers in accordance with the header modification operation, to check whether the entry specifies an additional header modification operation, to output the modified set of headers if the entry does not specify an additional header modification operation, and, if the entry specifies an additional header modification operation, to feed-back the modified set of headers.

Abstract: A network adapter includes a network interface, a host interface and processing circuitry. The network interface is configured to connect to a communication network. The host interface is configured to communicate with a host processor running multiple application programs. The processing circuitry includes one or more bandwidth-control policers, and is configured to receive from the communication network a packet destined to a given application program among the application programs running on the host processor, to associate a bandwidth-control policer with the packet, selected from among the bandwidth-control policers, and to apply the selected bandwidth-control policer to the packet to produce a policer result.

Abstract: A Network-Connected Device (NCD) includes a network interface, a host interface, an NCD memory and an NCD processor. The network interface is configured for communicating over a network. The host interface is configured for communicating with a host. The NCD memory is configured to buffer packet information that originates from the host and pertains to a packet to be transmitted to the network at a specified transmission time. The NCD processor is configured to process the buffered packet information before the specified transmission time, and to transmit the packet to the network at the specified time. Processing of the packet information and transmission of the packet are decoupled from buffering of the packet information.

Abstract: In one embodiment, a network device includes an interface configured to receive a data packet including a header section, at least one parser to parse the data of the header section yielding a first header portion and a second header portion, a packet processing engine to fetch a first match-and-action table, match a first index having a corresponding first steering action entry in the first match-and-action table responsively to the first header portion, compute a cumulative lookup value based on the first header portion and the second header portion responsively to the first steering action entry, fetch a second match-and-action table responsively to the first steering action entry, match a second index having a corresponding second steering action entry in the second match-and-action table responsively to the cumulative lookup value, and steering the packet responsively to the second steering action entry.

Abstract: A Network-Connected Device (NCD) includes a network interface, a host interface, an NCD memory and an NCD processor. The network interface is configured for communicating over a network. The host interface is configured for communicating with a host. The NCD memory is configured to buffer packet information that originates from the host and pertains to a packet to be transmitted to the network at a specified transmission time. The NCD processor is configured to process the buffered packet information before the specified transmission time, and to transmit the packet to the network at the specified time. Processing of the packet information and transmission of the packet are decoupled from buffering of the packet information.

Abstract: Communication apparatus includes a host interface and a network interface, which receives from a packet communication network at least one packet stream including a sequence of data packets, which include headers containing respective sequence numbers and data payloads containing slices of the data segment having a predefined, fixed size per slice. Packet processing circuitry is configured to receive the data packets from the network interface, and to map the data payloads of the data packets in the at least one packet stream, using a linear mapping of the sequence numbers, to respective addresses in the buffer.