Abstract: Various embodiments herein relate to methods and apparatus for depositing doped and undoped silicon-containing films having a high degree of purity. In one example, the method includes exposing the substrate to a first reactant and a second reactant; reacting the first and second reactants with one another to form a silicon-containing material and depositing a portion of the silicon-containing film on the substrate; before the silicon-containing film is complete, performing an impurity reduction operation including: (i) generating a plasma from a plasma generation gas comprising inert gas and hydrogen, where the plasma generation gas is substantially free of oxygen, and (ii) exposing the substrate to the plasma to thereby reduce a concentration of fluorine, carbon, hydrogen, and/or nitrogen in the silicon-containing film; and repeating these operations (or a subset thereof) until the silicon-containing film is deposited to a final thickness.

Abstract: Methods of forming air gaps in hole and trench structures are disclosed. The methods may be used to form buried voids, i.e., voids for which the top is below the top of the adjacent features. The methods include inhibition of the hole or trench structures and selective deposition at the top of the structure forming an air gap within the structures. In some embodiments, the methods are to reduce intra-level capacitance in semiconductor devices.

Abstract: Methods and apparatuses for depositing dielectric films into features on semiconductor substrates are described herein. Methods involve depositing dielectric films by using controlled thermal chemical vapor deposition, with periodic passivation operations and densification to modulate film properties.

Abstract: Various embodiments herein relate to methods and apparatus for depositing silicon oxide using thermal ALD or thermal CVD. In one aspect of the disclosed embodiments, a method for depositing silicon oxide is provided, the method including: (a) receiving the substrate in a reaction chamber; (b) introducing a first flow of a first reactant into the reaction chamber and exposing the substrate to the first reactant, where the first reactant includes a silicon-containing reactant; (c) introducing a second flow of a second reactant into the reaction chamber to cause a reaction between the first reactant and the second reactant, (i) where the second reactant includes hydrogen (H2) and an oxygen-containing reactant, (ii) where the reaction deposits silicon oxide on the substrate, and (iii) where the reaction is initiated when a pressure in the reaction chamber is greater than 10 Torr and equal to or less than about 40 Torr.

Abstract: A NAND structure and method of fabricating the structure are described. A multi-layer ONON stack is deposited on a Si substrate and a field oxide grown thereon. A portion of the field oxide is removed, and high-aspect-ratio channels are etched in the stack. The channels are filled with a Si oxide using a thermal ALD process. The thermal ALD process includes multiple growth cycles followed by a passivation cycle. Each growth cycle includes treating the surface oxide surface using an inhibitor followed by multiple cycles to deposit the oxide on the treated surface using a precursor and source of the oxide. The passivation after the growth cycle removes the residual inhibitor. The Si oxide is recess etched using a wet chemical etch of DHF and then capped using a poly-Si cap.

Abstract: A controller includes an accumulation determiner configured to determine a first accumulation value that indicates an amount of accumulation of material on surfaces within a processing chamber and a pressure controller configured to obtain the first accumulation value, obtain at least one of a setpoint pressure an etching step and a duration of the etching step, and, to control the pressure within the processing chamber during the etching step, adjust a control parameter based on (i) the first accumulation value and (ii) the at least one of the setpoint pressure and the duration of the etching step.

Abstract: Radio frequency power conveyed to individual process stations of a multi-station integrated circuit fabrication chamber may be adjusted so as to bring the rates at which fabrication processes occur, and/or fabrication process results, into alignment with one another. Such adjustment in radio frequency power, which may be accomplished via adjusting one or more reactive elements of a RF distribution network, may give rise to an imbalance in power delivered to each individual process station.

Abstract: Silicon oxide, silicon nitride, and silicon oxynitride films may be deposited by thermal atomic layer deposition (thermal ALD) in a single wafer plasma reactor. The single wafer plasma reactor can perform thermal ALD and plasma-enhanced atomic layer deposition (PEALD). Highly conformal films may be deposited at a high deposition rate without damaging or with minimal damage to the substrate using thermal ALD. The substrate may be heated at an elevated temperature during oxidation and/or nitridation. In some implementations, the elevated temperature is between about 500 C and about 750 C. In some implementations, hydrogen and oxygen may be flowed as reactant gases during oxidation, where the hydrogen and oxygen may react in an exothermic reaction to drive formation of oxide.

Abstract: Methods of providing control of film properties during atomic layer deposition using intermittent plasma treatment in-situ are provided herein. Methods include modulating gas flow rate ratios used to generate plasma during intermittent plasma treatment, toggling plasma power, and modulating chamber pressure.

Abstract: A method for depositing carbon on a substrate in a processing chamber includes arranging the substrate on a substrate support in the processing chamber. The substrate includes a carbon film having a first thickness formed on at least one underlying layer of the substrate. The method further includes performing a first etching step to etch the substrate to form features on the substrate, remove portions of the carbon film, and decrease the first thickness of the carbon film, selectively depositing carbon onto remaining portions of the carbon film, and performing at least one second etching step to etch the substrate to complete the forming of the features on the substrate.

Abstract: Methods and apparatuses for modifying a wafer surface using an organosilicon precursor are provided herein. The wafer surface is dosed with the organosilicon precursor following deposition of a dielectric material by an atomic layer deposition (ALD) process. In some implementations, the dielectric layer is made of silicon oxide. Dosing the wafer surface with the organosilicon precursor may occur in the same chamber as the ALD process. The organosilicon precursor may modify the wafer surface to increase its hydrophobicity so that photoresist adhesion is improved on the wafer surface. In some implementations, the wafer surface may be exposed to an inert gas RF plasma after dosing the wafer surface with the organosilicon precursor.

Abstract: Methods and apparatuses for selectively depositing silicon nitride (SiN) via high-density plasma chemical vapor deposition (HDP CVD) to form a SiN pad on an exposed flat surface of a nitride layer in a 3D NAND staircase structure with alternating oxide and nitride layers are provided. In some embodiments, selective etching is performed to remove undesirable buildup of SiN on sidewalls of the oxide layers of the staircase structure. Nitride layers of the staircase structure are replaced with tungsten (W) to form tungsten wordlines, while the SiN pads are replaced with tungsten to from landing pads, which prevent punchthrough of the tungsten wordlines on the staircase structure by interconnects extending thereto.

Abstract: Methods and apparatuses for selectively depositing silicon nitride (SiN) via high-density plasma chemical vapor deposition (HDP CVD) to form a SiN pad on an exposed flat surface of a nitride layer in a 3D NAND staircase structure with alternating oxide and nitride layers are provided. In some embodiments, selective etching is performed to remove undesirable buildup of SiN on sidewalls of the oxide layers of the staircase structure. Nitride layers of the staircase structure are replaced with tungsten (W) to form tungsten wordlines, while the SiN pads are replaced with tungsten to from landing pads, which prevent punchthrough of the tungsten wordlines on the staircase structure by interconnects extending thereto.