Abstract: A device for operating an apparatus comprising a first controller configured to be controlled by a first control signal, a second controller configured to be controlled by a second control signal, a control unit operatively connected to the first controller and the second controller, wherein the first controller and the second controller are both configured to operate the apparatus.

Abstract: A device for operating an apparatus comprising a first controller configured to be controlled by a first control signal, a second controller configured to be controlled by a second control signal, a control unit operatively connected to the first controller and the second controller, wherein the first controller and the second controller are both configured to operate the apparatus.

Abstract: A device for operating an apparatus comprising a first controller configured to be controlled by a first control signal, a second controller configured to be controlled by a second control signal, a control unit operatively connected to the first controller and the second controller, wherein the first controller and the second controller are both configured to operate the apparatus.

Abstract: A device for operating an apparatus comprising a first controller configured to be controlled by a first control signal, a second controller configured to be controlled by a second control signal, a control unit operatively connected to the first controller and the second controller, wherein the first controller and the second controller are both configured to operate the apparatus.

Abstract: Methods and systems for transferring a high-speed data signal between more than two electronic devices within a system comprising a master device and a plurality of slave devices are presented. The master device and the plurality of slave devices are connected through high-speed links between high-speed interfaces, thereby forming a closed ring. The high-speed interfaces are comprised by the master device and each of the plurality of slave devices, respectively. A common low frequency clock signal is provided by the master device to each of the slave devices, and a high-speed interface communication method for communication between the master device and the plurality of slave devices through the high-speed links is used.

Abstract: A device for operating an apparatus comprising a first controller configured to be controlled by a first control signal, a second controller configured to be controlled by a second control signal, a control unit operatively connected to the first controller and the second controller, wherein the first controller and the second controller are both configured to operate the apparatus.

Abstract: Methods and systems for transferring a high-speed data signal between more than two electronic devices within a system comprising a master device and a plurality of slave devices are presented. The master device and the plurality of slave devices are connected through high-speed links between high-speed interfaces, thereby forming a closed ring. The high-speed interfaces are comprised by the master device and each of the plurality of slave devices, respectively. A common low frequency clock signal is provided by the master device to each of the slave devices, and a high-speed interface communication method for communication between the master device and the plurality of slave devices through the high-speed links is used.

Abstract: One embodiment of the present invention relates to a low-power micro-controller unit having both a standby micro-controller optimized for low power consumption and a main micro-controller optimized for high performance. A power supply is coupled to the main micro-controller and the standby micro-controller. The power supply provides power to one or more of the low-power, standby micro-controller and the high performance, main micro-controller by separate power supply paths, depending on system needs. The separate power supply paths allow the main micro-controller and the standby micro-controller operate independent of each other. During a low-power standby operating mode, power can be disconnected to the main micro-controller, while providing power to the standby micro-controller, thereby eliminating the leakage current associated with the large number of transistors in the main micro-controller, while still retaining the computational capabilities of the standby micro-controller.

Abstract: One embodiment of the present invention relates to a low-power micro-controller unit having both a standby micro-controller optimized for low power consumption and a main micro-controller optimized for high performance. A power supply is coupled to the main micro-controller and the standby micro-controller. The power supply provides power to one or more of the low-power, standby micro-controller and the high performance, main micro-controller by separate power supply paths, depending on system needs. The separate power supply paths allow the main micro-controller and the standby micro-controller operate independent of each other. During a low-power standby operating mode, power can be disconnected to the main micro-controller, while providing power to the standby micro-controller, thereby eliminating the leakage current associated with the large number of transistors in the main micro-controller, while still retaining the computational capabilities of the standby micro-controller.

Abstract: An integrated circuit with multiple circuit cores each of which have integrated emulated circuits, and an emulation interface module, such that the integrated circuit has an on-chip debugging system. As cores other than a processor core have integrated emulation circuits, debugging of programs and operations of systems-on-a-chip becomes viable.

Abstract: An integrated circuit with multiple circuit cores each of which have integrated emulated circuits, and an emulation interface module, such that the integrated circuit has an on-chip debugging system. As cores other than a processor core have integrated emulation circuits, debugging of programs and operations of systems-on-a-chip becomes viable.