Abstract: A method for automatic detection of a functional primitive in a model of a hardware system, the model being a netlist having cells and net links therebetween, comprising the steps: a) mapping the cells to target nodes, each of which having a target node type, and the net links to edges of a target graph, and mapping the functional primitive to a search pattern having search nodes and connections therebetween; b) selecting candidates from those target nodes the target node types of which match a search node type, and selecting a candidate structure from those selected candidates the target nodes and edges of which match the search nodes and connections of the search pattern; c) reverse-mapping the target nodes and edges of the selected candidate structure to the cells and net links of the netlist; and d) outputting said cells and net links as detected functional primitive.

Abstract: A method for automatic detection of a functional primitive in a model of a hardware system, the model being a netlist having cells and net links therebetween, comprising the steps: a) mapping the cells to target nodes, each of which having a target node type, and the net links to edges of a target graph, and mapping the functional primitive to a search pattern having search nodes and connections therebetween; b) selecting candidates from those target nodes the target node types of which match a search node type, and selecting a candidate structure from those selected candidates the target nodes and edges of which match the search nodes and connections of the search pattern; c) reverse-mapping the target nodes and edges of the selected candidate structure to the cells and net links of the netlist; and d) outputting said cells and net links as detected functional primitive.

Abstract: A controller is provided which comprises one or more processors, a control store, a first interface control unit for interfacing a local core and a second interface control unit for interfacing one or more remote cores via an interconnect, wherein the processor/s discloses programmable mini-processor/s is adapted to execute, add, remove or modify a function by executing micro-code maintained typically in the local memory but also possibly in remote, or even off-chip memory, and obtained via the control store, in response to receiving a command from the first or the second interface control unit.