Patents by Inventor Axel K. Kloth

Axel K. Kloth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7200107
    Abstract: Method and apparatus for lossless switchover in a redundant switch fabric improves the reliability and predictability of a cell reaching its destination without the cell being lost during switch-over through redundant switch fabrics. Ingress and egress buffers are disposed in input and output line cards to maintain the history of transmitted cells. When switch-over occurs, the cells transmission history is used to recover lost cells transparently and with minimal latency.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: April 3, 2007
    Assignee: Mindspeed Technologies, Inc.
    Inventor: Axel K. Kloth
  • Publication number: 20040165597
    Abstract: Alternate routing tables selected according to data packet priority or according to source and destination addresses of data packet. Data packet propagated to egress port according to indicator provided by selected routing table with expediency dictated by data packet priority or priority indicator stored in the selected routing table.
    Type: Application
    Filed: February 20, 2003
    Publication date: August 26, 2004
    Inventors: Jeremy Bicknell, Daniel Fu, Axel K. Kloth, Stephen M. Mills, Warner Andrews, Paul Bergantino, Moshe De-Leon
  • Publication number: 20040156546
    Abstract: An image processing system processes images via a first processing layer adapted to perform object-independent processing, a second processing layer adapted to perform object-dependent processing, and a third processing layer adapted to perform object composition, recognition and association. The image processing system performs object-independent processing using a plurality of processors each of which is associated with a different one of the pixels of the image. The image processing system performs object-independent processing using a symmetric multi-processor. The plurality of processors may form a massively parallel processor of a systolic array type and configured as a single-instruction multiple-data system. Each of the plurality of the processors is further configured to perform object-independent processing using a unified and symmetric processing of N dimensions in space and one dimension in time.
    Type: Application
    Filed: January 15, 2004
    Publication date: August 12, 2004
    Applicant: Parimics, Inc.
    Inventor: Axel K. Kloth
  • Publication number: 20040156547
    Abstract: An image processing system includes, in part, an image processing engine adapted to perform object-independent processing corresponding to a first processing layer of the image processing system, a post processing engine adapted to perform object-dependent processing corresponding to a second processing layer of the image processing system, and a processing engine adapted to perform object composition, recognition and association corresponding to a third processing layer of the image processing system The image processing engine includes a multitude of processors each associated with a different one of the pixels of the image. The post processing engine includes an N-way symmetric multi-processing system (SMP) having disposed therein N DFT engines and N matrix multiplication engines, where N is an integer greater than 1. The multitude of the processors of the image processing engine are formed on a semiconductor substrate different from the semiconductor substrate on which images are captured.
    Type: Application
    Filed: January 15, 2004
    Publication date: August 12, 2004
    Applicant: Parimics, Inc.
    Inventor: Axel K. Kloth
  • Publication number: 20040081169
    Abstract: A method and apparatus is disclosed for interfacing an asynchronous network with a synchronous network and in particular for efficiently utilizing available bandwidth of a synchronous network transmit opportunity. In one embodiment asynchronous traffic arrives via an asynchronous network at a network device, such as a switch, for transmission over a synchronous network. The traffic is parsed into cells and after switching, a reassembly unit is provided for processing one or more cells buckets. Write operations occur based on an ingress pointer while read operations are controlled by an egress pointer. Upon occurrence of a transmit opportunity on the synchronous network, the entire bandwidth of the transmit opportunity is utilized by loading awaiting cells from bucket memory on to the synchronous network. Sufficient cells are stored in memory between the memory locations identified by the ingress pointer and the egress pointer to insure total utilization of transmit opportunity bandwidth.
    Type: Application
    Filed: October 29, 2002
    Publication date: April 29, 2004
    Inventors: Axel K. Kloth, Paul Bergantino, Moshe De-Leon, Daniel Fu, Stephen M. Mills, Jeremy Bicknell, Warner Andrews
  • Publication number: 20030179767
    Abstract: System and method for dynamically altering bandwidth allocation to each region serviced by a network. Each region is allocated an initial estimated bandwidth on the network and compares instantaneous demand against the allocation. When demand falls below the allocation, the region releases bandwidth so other regions can take advantage of that bandwidth. When demand exceeds the allocation, the region takes advantage of bandwidth released by other regions.
    Type: Application
    Filed: March 23, 2002
    Publication date: September 25, 2003
    Inventors: Axel K. Kloth, Warner Andrews, Paul Bergantino, Jeremy Bicknell, Daniel Fu, Moshe De-Leon, Stephen M. Mills
  • Patent number: 6598034
    Abstract: A apparatus and method that provides a routing engine for processing data packets based upon certain rules that are compiled and applied real-time via a just-in-time (JIT) compiler, a runtime compiler, or the like. The routing engine parses and analyzes an incoming IP flow. A set of rules are developed and stored for use by the JIT. The rules establish a set of patterns, and the incoming data is compared to those patterns. If certain patterns are detected, then the associated action established by the rule is applied to the processing of the data packet. Packets are classified according to any rule, as applied to any packet, as early as possible in the process (i.e. first or second stage of process), with the route lookup and packet attribute processes performed in parallel. Data packets might be assigned or mapped to various traffic service levels. Traffic types and priorities, as well as service levels, can be mapped onto existing QoS/CoS definitions and assignments.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: July 22, 2003
    Assignee: Infineon Technologies North America Corp.
    Inventor: Axel K. Kloth
  • Publication number: 20030086434
    Abstract: A router (101) includes one or more input ports (104) and one or more output ports (112). The router (101) includes a lookup table (105) to determine routing of the incoming packets or cells. The lookup table is implemented in dynamic random access memory (DRAM) with a portion implemented as static random access memory (SRAM) (202, 204). The SRAM (204) is used to store a first search level of destination addresses. Once the first search level in SRAM (204) has been exhausted, the search moves to the DRAM portion (202).
    Type: Application
    Filed: November 2, 2001
    Publication date: May 8, 2003
    Inventor: Axel K. Kloth
  • Patent number: 6549961
    Abstract: Access control to protected resources in a multiprocessor system is implemented without additional use of the processor bus. A bridge interconnects each processor with shared resources. The bridge has a semaphore corresponding to each protected resource indicating if the corresponding resource is available. The bridge halts a processor requesting access to any resource having a corresponding semaphore indicating the requested resource is not available.
    Type: Grant
    Filed: October 27, 1999
    Date of Patent: April 15, 2003
    Assignee: Infineon Technologies North America Corporation
    Inventor: Axel K. Kloth
  • Patent number: 6470114
    Abstract: An optical fiber interconnect is provided having a tetrahedral or corner cube retroreflector. The optical fibers are provided in sufficiently close proximity to the retroreflector that a desired level of reflected light is provided to the receiving fiber. In one embodiment, the optical fibers are provided in contact with the retroreflector.
    Type: Grant
    Filed: August 23, 1999
    Date of Patent: October 22, 2002
    Assignee: Infineon Technologies AG
    Inventor: Axel K. Kloth
  • Publication number: 20020089926
    Abstract: Method and apparatus for lossless switchover in a redundant switch fabric improves the reliability and predictability of a cell reaching its destination without the cell being lost during switch-over through redundant switch fabrics. Ingress and egress buffers are disposed in input and output line cards to maintain the history of transmitted cells. When switch-over occurs, the cells transmission history is used to recover lost cells transparently and with minimal latency.
    Type: Application
    Filed: November 30, 2001
    Publication date: July 11, 2002
    Inventor: Axel K. Kloth