Patents by Inventor Aya SHINDOME

Aya SHINDOME has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967641
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third nitride regions, and first and second insulating films. The first nitride region includes Alx1Ga1?x1N, and includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The first nitride region includes first to fifth partial regions. The second nitride region includes Alx2Ga1?x2N, and sixth and seventh partial regions. At least a portion of the third electrode is between the sixth and seventh partial regions. The first insulating film includes silicon and oxygen and includes first and second insulating regions. The third nitride region includes Alx3Ga1?x3N, and first to seventh portions. The second insulating film includes silicon and oxygen and includes third to seventh insulating regions.
    Type: Grant
    Filed: April 26, 2023
    Date of Patent: April 23, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Daimotsu Kato, Yosuke Kajiwara, Akira Mukai, Aya Shindome, Hiroshi Ono, Masahiko Kuraguchi
  • Publication number: 20240047534
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor region, a second semiconductor region, a first layer, a second layer, and a first insulating layer. The third electrode includes a first electrode portion. The first semiconductor region includes Alx1Ga1-x1N (0?x1<1). The first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region and a fifth partial region. The second semiconductor region includes Alx2Ga1-x2N (x1<x2?1). The second semiconductor region includes a first semiconductor portion and a second semiconductor portion. The first layer includes Al and N. The first layer includes a first compound region. The second layer includes Al, Si, O and N. The second layer includes a first intermediate region. The first insulating layer includes Si and O.
    Type: Application
    Filed: February 22, 2023
    Publication date: February 8, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Hiroshi ONO, Daimotsu KATO, Aya SHINDOME, Masahiko KURAGUCHI
  • Publication number: 20240038849
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first nitride region, a second nitride region, and a third nitride region. The first nitride region includes Alx1Ga1-x1N (0?x1<1). The first nitride region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The second nitride region includes Alx2Ga1-x2N (x1<x2?1) or InyAlzGa(1-y-z)N (0<y?1, 0?z<1, y+z?1). The second nitride region includes a sixth partial region. The third nitride region includes Alx3Ga1-x3N (x1<x3<x2). The third nitride region includes a seventh partial region.
    Type: Application
    Filed: February 22, 2023
    Publication date: February 1, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Aya SHINDOME, Masahiko KURAGUCHI
  • Publication number: 20230268430
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third nitride regions, and first and second insulating films. The first nitride region includes Alx1Ga1?x1N, and includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The first nitride region includes first to fifth partial regions. The second nitride region includes Alx2Ga1?x2N, and sixth and seventh partial regions. At least a portion of the third electrode is between the sixth and seventh partial regions. The first insulating film includes silicon and oxygen and includes first and second insulating regions. The third nitride region includes Alx3Ga1?x3N, and first to seventh portions. The second insulating film includes silicon and oxygen and includes third to seventh insulating regions.
    Type: Application
    Filed: April 26, 2023
    Publication date: August 24, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Daimotsu KATO, Yosuke KAJIWARA, Akira MUKAI, Aya SHINDOME, Hiroshi ONO, Masahiko KURAGUCHI
  • Publication number: 20230246079
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor member, an electrode portion, a pad portion, and first and second conductive members. The semiconductor member includes a first semiconductor layer and a second semiconductor layer. The electrode portion includes a source electrode, a gate electrode including a first gate portion, and a drain electrode. The first gate portion is between the source electrode and the drain electrode. The pad portion includes a drain pad. The first conductive member includes a first conductive portion. The drain pad is between the electrode portion and the first conductive portion. The second conductive member includes at least one of first to third conductive regions. The first conductive portion is between the drain pad and the first conductive region. The electrode portion is between the second conductive region and the third conductive region.
    Type: Application
    Filed: August 19, 2022
    Publication date: August 3, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Masahiko KURAGUCHI, Aya SHINDOME, Hiroshi ONO
  • Publication number: 20230187500
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, and a first member. The first semiconductor region includes Alx1Ga1-x1N (0?x1<1). The second semiconductor region includes Alx2Ga1-x2N (x1<x2?1). The first member includes first and second regions. The second region is between the first region and the first electrode region of the second electrode. A part of the second region is between the second semiconductor portion of the second semiconductor region and the second electrode region. The second region includes at least one first element selected from the group consisting of Ti, Al, Ga, Ni, Nb, Mo, Ta, Hf, V, and Au. The first region does not include the first element, or a concentration of the first element in the first region is lower than a concentration of the first element in the second region.
    Type: Application
    Filed: June 29, 2022
    Publication date: June 15, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Aya SHINDOME, Masahiko KURAGUCHI
  • Patent number: 11677020
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third nitride regions, and first and second insulating films. The first nitride region includes Alx1Ga1?x1N, and includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The first nitride region includes first to fifth partial regions. The second nitride region includes Alx2Ga1?x2N, and sixth and seventh partial regions. At least a portion of the third electrode is between the sixth and seventh partial regions. The first insulating film includes silicon and oxygen and includes first and second insulating regions. The third nitride region includes Alx3Ga1?x3N, and first to seventh portions. The second insulating film includes silicon and oxygen and includes third to seventh insulating regions.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: June 13, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Daimotsu Kato, Yosuke Kajiwara, Akira Mukai, Aya Shindome, Hiroshi Ono, Masahiko Kuraguchi
  • Publication number: 20230061811
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, first and second insulating members, a compound member, and a nitride member. The third electrode is between the first and second electrodes. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first to fifth partial regions. The second semiconductor region includes first and second semiconductor portions. The first insulating member includes first and second insulating portions. The first semiconductor portion is between the fourth partial region and the first insulating portion. The second semiconductor portion is between the fifth partial region and the second insulating portion. The compound member includes first to third compound portions. The nitride member includes first to third nitride portions. The second insulating member includes first and second insulating regions.
    Type: Application
    Filed: March 1, 2022
    Publication date: March 2, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Daimotsu KATO, Hiroshi ONO, Yosuke KAJIWARA, Aya SHINDOME, Akira MUKAI, Po-Chin HUANG, Masahiko KURAGUCHI, Tatsuo SHIMIZU
  • Publication number: 20230068711
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a first conductive member, first and second insulating members, and a first nitride member. A position of the third electrode in a first direction from the first to second electrodes is between positions of the first and second electrodes in the first direction. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first to fifth partial regions. The second semiconductor region includes first and second semiconductor portions. The second semiconductor portion includes first and second portions, and a third portion between the first and second portions. The first conductive member includes first and second conductive regions. The first insulating member includes a first insulating region. The second insulating member includes first and second insulating portions. The first nitride member includes a first nitride region.
    Type: Application
    Filed: March 1, 2022
    Publication date: March 2, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Daimotsu KATO, Yosuke KAJIWARA, Hiroshi ONO, Aya SHINDOME, Akira MUKAI, Po-Chin HUANG, Masahiko KURAGUCHI, Tatsuo SHIMIZU
  • Publication number: 20220393006
    Abstract: According to one embodiment, a semiconductor device includes first, second, third electrodes, first, and second semiconductor regions, a first conductive member, and an insulating member. The third electrode is between the first and second electrodes. The first semiconductor region includes first to sixth partial regions. The second semiconductor region includes first to third semiconductor portions. The first conductive member is electrically connected with a first one of the first and third electrodes. The first conductive member includes a first conductive end portion. The insulating member includes first and second nitride regions. The second semiconductor portion is between the fifth partial region and the first nitride region. The third semiconductor portion is between the sixth partial region and the second nitride region. The first nitride region includes a first nitride end portion. The first nitride end portion is in contact with the second semiconductor region.
    Type: Application
    Filed: February 2, 2022
    Publication date: December 8, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Aya SHINDOME, Yosuke KAJIWARA, Masahiko KURAGUCHI
  • Patent number: 11476336
    Abstract: According to one embodiment, a semiconductor device includes first, second and third electrodes, first and second semiconductor layers, and a first compound member. A position of the third electrode is between a position of the second electrode and a position of the first electrode. The first semiconductor layer includes first, second, third, fourth, and fifth partial regions. The fourth partial region is between the third and first partial regions. The fifth partial region is between the second and third partial regions. The second semiconductor layer includes first, second, and third semiconductor regions. The third semiconductor region is between the first partial region and the first electrode. The first compound member includes first compound portions between the third semiconductor region and the first electrode. A portion of the first electrode is between one of the first compound portions and an other one of the first compound portions.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: October 18, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Ono, Akira Mukai, Yosuke Kajiwara, Daimotsu Kato, Aya Shindome, Masahiko Kuraguchi
  • Patent number: 11476358
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor layers, and an insulating member. The third electrode in a first direction is between the first and second electrodes in the first direction. The first direction is from the first toward second electrode. The first semiconductor layer includes Alx1Ga1-x1N (0?x1<1), and first to sixth partial regions. A second direction from the first partial region toward the first electrode crosses the first direction. The second semiconductor layer includes Alx2Ga1-x2N (0<x2<1 and x1<x2), and first and second semiconductor regions. A direction from the fourth partial region toward the first semiconductor region is along the second direction. A direction toward the second semiconductor region from the fifth and sixth partial regions is along the second direction. The insulating member includes first to third insulating regions.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: October 18, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Kajiwara, Aya Shindome, Masahiko Kuraguchi
  • Publication number: 20220140125
    Abstract: According to one embodiment, a semiconductor device includes first, second and third electrodes, first and second semiconductor layers, a first member, and a first insulating member. The first semiconductor layer includes Alx1Ga1-x1N (0?x1<1). The first semiconductor layer includes first, second, third, fourth, fifth, and sixth partial regions. The second semiconductor layer includes Alx2Ga1-x2N (0<x2—1, x1<x2). The second semiconductor layer includes first and second semiconductor portions. The first insulating member includes a first insulating region and includes a first material. The first insulating region contacts the third partial region and a part of the third electrode. The first member includes a first portion and includes a second material different from the first material. The first portion is between the fourth partial region and an other part of the third electrode.
    Type: Application
    Filed: January 14, 2022
    Publication date: May 5, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Daimotsu KATO, Hiroshi ONO, Tatsuo SHIMIZU, Yosuke KAJIWARA, Aya SHINDOME, Akira MUKAI, Po-Chin HUANG, Masahiko KURAGUCHI
  • Publication number: 20220130986
    Abstract: According to one embodiment, a semiconductor device includes first, second and third electrodes, first and second semiconductor layers, a first member, and a first insulating member. The first semiconductor layer includes Alx1Ga1-x1N (0?x1<1). The first semiconductor layer includes first, second, third, fourth, fifth, and sixth partial regions. The second semiconductor layer includes Alx2Ga1-x2N (0<x2?1, x1<x2). The second semiconductor layer includes first and second semiconductor portions. The first insulating member includes a first insulating region and includes a first material. The first insulating region contacts the third partial region and a part of the third electrode. The first member includes a first portion and includes a second material different from the first material. The first portion is between the fourth partial region and an other part of the third electrode.
    Type: Application
    Filed: August 12, 2021
    Publication date: April 28, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Daimotsu KATO, Hiroshi ONO, Tatsuo SHIMIZU, Yosuke KAJIWARA, Aya SHINDOME, Akira MUKAI, Po-Chin HUANG, Masahiko KURAGUCHI
  • Publication number: 20220045202
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor layers, and an insulating member. The third electrode in a first direction is between the first and second electrodes in the first direction. The first direction is from the first toward second electrode. The first semiconductor layer includes Alx1Ga1-x1N (0?x1<1), and first to sixth partial regions. A second direction from the first partial region toward the first electrode crosses the first direction. The second semiconductor layer includes Alx2Ga1-x2N (0<x2<1 and x1<x2), and first and second semiconductor regions. A direction from the fourth partial region toward the first semiconductor region is along the second direction. A direction toward the second semiconductor region from the fifth and sixth partial regions is along the second direction. The insulating member includes first to third insulating regions.
    Type: Application
    Filed: January 19, 2021
    Publication date: February 10, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Aya SHINDOME, Masahiko KURAGUCHI
  • Publication number: 20210384337
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third nitride regions, and first and second insulating films. The first nitride region includes Alx1Ga1?x1N, and includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The first nitride region includes first to fifth partial regions. The second nitride region includes Alx2Ga1?x2N, and sixth and seventh partial regions. At least a portion of the third electrode is between the sixth and seventh partial regions. The first insulating film includes silicon and oxygen and includes first and second insulating regions. The third nitride region includes Alx3Ga1?x3N, and first to seventh portions. The second insulating film includes silicon and oxygen and includes third to seventh insulating regions.
    Type: Application
    Filed: August 20, 2021
    Publication date: December 9, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Daimotsu KATO, Yosuke KAJIWARA, Akira MUKAI, Aya SHINDOME, Hiroshi ONO, Masahiko KURAGUCHI
  • Patent number: 11189718
    Abstract: According to one embodiment, a semiconductor device includes first, second and third electrodes, first and second semiconductor layers, a first conductive part, first and second insulating layers. The third electrode includes first and second portions. The first portion is between the first electrode and the second electrode. The first semiconductor layer includes first, second, third, fourth and fifth partial regions. The third partial region is between the first and second partial regions. The fourth partial region is between the first and third partial regions. The fifth partial region is between the third and second partial regions. The second semiconductor layer includes first and second semiconductor regions. The first conductive part is electrically connected to the first electrode. The first insulating layer includes a first insulating portion. The second insulating layer includes first and second insulating regions.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: November 30, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Masahiko Kuraguchi, Yosuke Kajiwara, Aya Shindome, Hiroshi Ono, Daimotsu Kato, Akira Mukai
  • Patent number: 11152480
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first conductive member, a first semiconductor layer, a second semiconductor layer, and an insulating member. The third electrode is between the first electrode and the second electrode. The first conductive member is electrically connected to the first electrode. The first conductive member is between the third electrode and the second electrode. The first semiconductor layer includes Alx1Ga1?x1N and includes first, second, third, fourth, and fifth partial regions. The second semiconductor layer includes Alx2Ga1?x2N and includes a first semiconductor region and a second semiconductor region. The insulating member includes first, second, third, fourth, and fifth insulating regions. The first insulating region is between the third partial region and the third electrode. The second insulating region is between the fifth partial region and the first conductive member.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: October 19, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Aya Shindome, Masahiko Kuraguchi
  • Patent number: 11139393
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third nitride regions, and first and second insulating films. The first nitride region includes Alx1Ga1-x1N, and includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The first nitride region includes first to fifth partial regions. The second nitride region includes Alx2Ga1-x2N, and sixth and seventh partial regions. At least a portion of the third electrode is between the sixth and seventh partial regions. The first insulating film includes silicon and oxygen and includes first and second insulating regions. The third nitride region includes Alx3Ga1-x3N, and first to seventh portions. The second insulating film includes silicon and oxygen and includes third to seventh insulating regions.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: October 5, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Daimotsu Kato, Yosuke Kajiwara, Akira Mukai, Aya Shindome, Hiroshi Ono, Masahiko Kuraguchi
  • Patent number: RE49962
    Abstract: According to one embodiment, a semiconductor device includes first and second regions, a first insulating portion, and first, second, and third electrodes. The first region includes first and second partial regions, and a third partial region between the first and second partial regions. The second region includes fourth and fifth partial regions. The fourth partial region overlaps the first partial region. The fifth partial region overlaps the second partial region. The first insulating portion includes first, second, and third insulating regions. The first insulating region is provided between the second insulating region and the third partial region and between the third insulating region and the third partial region. The first electrode is electrically connected to the fourth partial region. The second electrode is away from the first electrode and is electrically connected to the fifth partial region. The third electrode is provided between the first and second electrodes.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: May 7, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Masahiko Kuraguchi, Yosuke Kajiwara, Aya Shindome, Hiroshi Ono, Daimotsu Kato, Akira Mukai