Abstract: A transistor includes a control electrode, a first current electrode and a second current electrode. The control electrode includes a body portion, and first and second hand portions protruded from first and second ends of the body portion, respectively. The first current electrode is electrically insulated from the control electrode and disposed over a region between the first and second hand portions of the control electrode. A portion of the first current electrode is overlapped with a portion of the control electrode. The second current electrode is electrically insulated from the control electrode and partially overlapped with the body portion, the first hand portion and the second hand portion of the control electrode. Therefore, parasitic capacitance is reduced.

Abstract: An amorphous-silicon thin film transistor and a shift resister shift resister having the amorphous-silicon TFT include a first conductive region, a second conductive region and a third conductive region. The first conductive region is formed on a first plane spaced apart from a substrate by a first distance. The second conductive region is formed on a second plane spaced apart from the substrate by a second distance. The second conductive region includes a body conductive region and two hand conductive regions elongated from both ends of the body conductive region to form an U-shape. The third conductive region is formed on the second plane. The third conductive region includes an elongated portion. The elongated portion is disposed between the two hand conductive regions of the second conductive region. The amorphous-silicon TFT and the shift resister having the amorphous TFT reduce a parasitic capacitance between the gate electrode and drain electrode.

Abstract: An amorphous-silicon thin film transistor and a shift resister shift resister having the amorphous-silicon TFT include a first conductive region, a second conductive region and a third conductive region. The first conductive region is formed on a first plane spaced apart from a substrate by a first distance. The second conductive region is formed on a second plane spaced apart from the substrate by a second distance. The second conductive region includes a body conductive region and two hand conductive regions elongated from both ends of the body conductive region to form an U-shape. The third conductive region is formed on the second plane. The third conductive region includes an elongated portion. The elongated portion is disposed between the two hand conductive regions of the second conductive region. The amorphous-silicon TFT and the shift resister having the amorphous TFT reduce a parasitic capacitance between the gate electrode and drain electrode.

Abstract: In a shift register and LCD device having the shift register that may be employed in the liquid crystal display device having a large screen size and a large resolution, the shift register includes stages connected with each other and each of the stages have a carry buffer for generating a carry signal. The pull-down transistor of each of the stages of the shift register is divided into a first pull-down transistor and a second pull-down transistor. A power voltage Vona larger than the power voltage Von applied to a clock generator is applied to the shift register. A signal delay due to the RC delay of the gate lines may be minimized, the shift register is independent of the variation of the threshold voltage of the TFTs, and image display quality may not be deteriorated.

Abstract: In a mother substrate for a lower substrate, a substrate for a display panel and a method of manufacturing a display panel, the substrate for the display panel includes a lower substrate and an upper substrate facing the lower substrate. The lower substrate includes an inspection line that receives a first inspection signal externally provided, a gate driving part that outputs a second inspection signal in response to the first inspection signal from the inspection line, and a pixel part driven in response to the second inspection signal. The inspection line is disposed on a grinding area. Thus, the display panel may have an enhanced productivity and an improved yield, on which the gate driving part is formed.

Abstract: In a shift register and LCD device having the shift register that may be employed in the liquid crystal display device having a large screen size and a large resolution, the shift register includes stages cascade-connected with each other and each of the stages have a carry buffer for generating a carry signal. The pull-down transistor of each of the stages of the shift register is divided into a first pull-down transistor and a second pull-down transistor. A power voltage Vona larger than the power voltage Von applied to a clock generator is applied to the shift register. A signal delay due to the RC delay of the gate lines may be minimized, the shift register is independent of the variation of the threshold voltage of the TFTs, and image display quality may not be deteriorated.

Abstract: A thin film transistor panel for a liquid crystal display includes a substrate, a plurality of data lines formed over the substrate and extending in a first direction, and a plurality of gate lines formed over the substrate and extending in a second direction. The plurality of gate lines cross the plurality of data lines to form a plurality of pixel areas, each of the plurality of pixel areas having a multi-bent band shape. Each of a plurality of pixel electrodes are formed in a corresponding pixel area.

Abstract: An amorphous-silicon thin film transistor and a shift resister shift resister having the amorphous-silicon TFT include a first conductive region, a second conductive region and a third conductive region. The first conductive region is formed on a first plane spaced apart from a substrate by a first distance. The second conductive region is formed on a second plane spaced apart from the substrate by a second distance. The second conductive region includes a body conductive region and two hand conductive regions elongated from both ends of the body conductive region to form an U-shape. The third conductive region is formed on the second plane. The third conductive region includes an elongated portion. The elongated portion is disposed between the two hand conductive regions of the second conductive region. The amorphous-silicon TFT and the shift resister having the amorphous TFT reduce a parasitic capacitance between the gate electrode and drain electrode.

Abstract: A shift register has multiple stages each of which includes a pull-up part to generate a current gate line driving signal having a first state in response to a first control signal and a clock signal, a pull-down part to generate the current gate line driving signal having a second state in response to a second control signal, a pull-up driver to generate the first control signal to control the pull-up part in response to a previous gate line driving signal provided from a previous stage, a following gate line driving signal provided from a following stage, and an input voltage signal externally provided, and a pull-down driver to generate the second control signal to control the pull-down part in response to a third control signal provided from the pull-up driver and the input voltage signal, in which the second control signal swings between first and second voltage levels in association with the input voltage signal that swings between predetermined voltage levels.

Abstract: In a shift register and LCD device having the shift register that may be employed in the liquid crystal display device having a large screen size and a large resolution, the shift register includes stages cascade-connected with each other and each of the stages have a carry buffer for generating a carry signal. The pull-down transistor of each of the stages of the shift register is divided into a first pull-down transistor and a second pull-down transistor. A power voltage Vona larger than the power voltage Von applied to a clock generator is applied to the shift register. A signal delay due to the RC delay of the gate lines may be minimized, the shift register is independent of the variation of the threshold voltage of the TFTs, and image display quality may not be deteriorated.

Abstract: A driver circuit drives display device and LCD device has a driver circuit that includes driving stages and dummy stage. The driving stage includes output and control terminals. The output terminal of the present stage is connected to the control terminal of the previous state to be cascade-connected each other. The driving stage outputs driving signal for controlling the switching device arranged on the display device through the output terminal. The dummy stage includes dummy output terminal and dummy control terminal. The dummy output terminal is connected to the control terminal of the last driving stage to output dummy output signal for turning on or off the last driving stage. The dummy control terminal is connected to the dummy output terminal to be turned on or off by the dummy output signal. The delay of signals is reduced, thereby enhancing display quality.