Patents by Inventor Badri N. Varadarajan

Badri N. Varadarajan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240048643
    Abstract: Methods for building, transmitting, and receiving frame structures in power line communications (PLC) are described. Various techniques described herein provide a preamble design using one or more symbols. One or more preamble symbols may be interspersed within a header portion of a PLC frame to facilitate estimation of a frame boundary and/or sampling frequency offset, for example, in the presence of impulsive noise.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 8, 2024
    Inventors: Anand G. Dabak, Badri N. Varadarajan, Il Han Kim, Tarkesh Pande
  • Publication number: 20230421201
    Abstract: In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line.
    Type: Application
    Filed: September 5, 2023
    Publication date: December 28, 2023
    Inventors: Badri N. Varadarajan, Anand Dabak, II Han Kim
  • Patent number: 11831744
    Abstract: Methods for building, transmitting, and receiving frame structures in power line communications (PLC) are described. Various techniques described herein provide a preamble design using one or more symbols. One or more preamble symbols may be interspersed within a header portion of a PLC frame to facilitate estimation of a frame boundary and/or sampling frequency offset, for example, in the presence of impulsive noise.
    Type: Grant
    Filed: December 29, 2022
    Date of Patent: November 28, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Anand G. Dabak, Badri N Varadarajan, Il Han Kim, Tarkesh Pande
  • Patent number: 11791862
    Abstract: In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parIty information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: October 17, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Badri N Varadarajan, Anand Dabak, Il Han Kim
  • Publication number: 20230138448
    Abstract: Methods for building, transmitting, and receiving frame structures in power line communications (PLC) are described. Various techniques described herein provide a preamble design using one or more symbols. One or more preamble symbols may be interspersed within a header portion of a PLC frame to facilitate estimation of a frame boundary and/or sampling frequency offset, for example, in the presence of impulsive noise.
    Type: Application
    Filed: December 29, 2022
    Publication date: May 4, 2023
    Inventors: Anand G. Dabak, Badri N Varadarajan, Il Han Kim, Tarkesh Pande
  • Patent number: 11546450
    Abstract: Methods for building, transmitting, and receiving frame structures in power line communications (PLC) are described. Various techniques described herein provide a preamble design using one or more symbols. One or more preamble symbols may be interspersed within a header portion of a PLC frame to facilitate estimation of a frame boundary and/or sampling frequency offset, for example, in the presence of impulsive noise.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: January 3, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Anand G. Dabak, Badri N Varadarajan, Il Han Kim, Tarkesh Pande
  • Publication number: 20220321171
    Abstract: Systems and methods for designing, using, and/or implementing beacon-enabled communications for variable payload transfers are described. In various embodiments, these systems and methods may be applicable to power line communications (PLC). For example, a method may include implementing a superframe having a plurality of beacon slots, a plurality of intermediate slots following the beacon slots, and a poll-based Contention Free Period (CFP) slot following the intermediate slots. Each of the beacon slots and each of the intermediate slots may correspond to a respective one of a plurality of frequency subbands, and the poll-based CFP slot may correspond to a combination of the plurality of frequency subbands. The method may also include receiving a poll request over a first of the plurality of frequency subbands during the poll-based CFP slot, and then transmitting a data packet over a second of the plurality of frequency subbands during the poll-based CFP slot.
    Type: Application
    Filed: June 20, 2022
    Publication date: October 6, 2022
    Inventors: Kumaran Vijayasankar, Ramanuja Vedantham, Badri N. Varadarajan, Anand G. Dabak
  • Publication number: 20220225193
    Abstract: Simplified communication between user equipment and a neighboring cell not the primary cell is achieved by restricting the transmission parameters, such as bandwidth, of the neighboring cell transmission and provision of a simplified secondary baseband processor in the user equipment.
    Type: Application
    Filed: April 4, 2022
    Publication date: July 14, 2022
    Inventors: Shantanu Kangude, Pierre Bertrand, Badri N. Varadarajan
  • Patent number: 11368190
    Abstract: Systems and methods for designing, using, and/or implementing beacon-enabled communications for variable payload transfers are described. In various embodiments, these systems and methods may be applicable to power line communications (PLC). For example, a method may include implementing a superframe having a plurality of beacon slots, a plurality of intermediate slots following the beacon slots, and a poll-based Contention Free Period (CFP) slot following the intermediate slots. Each of the beacon slots and each of the intermediate slots may correspond to a respective one of a plurality of frequency subbands, and the poll-based CFP slot may correspond to a combination of the plurality of frequency subbands. The method may also include receiving a poll request over a first of the plurality of frequency subbands during the poll-based CFP slot, and then transmitting a data packet over a second of the plurality of frequency subbands during the poll-based CFP slot.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: June 21, 2022
    Assignee: Texas Instruments Incorporated
    Inventors: Kumaran Vijayasankar, Ramanuja Vedantham, Badri N. Varadarajan, Anand G. Dabak
  • Patent number: 11297549
    Abstract: Simplified communication between user equipment and a neighboring cell not the primary cell is achieved by restricting the transmission parameters, such as bandwidth, of the neighboring cell transmission and provision of a simplified secondary baseband processor in the user equipment.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: April 5, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shantanu Kangude, Pierre Bertrand, Badri N. Varadarajan
  • Publication number: 20210320991
    Abstract: Methods for building, transmitting, and receiving frame structures in power line communications (PLC) are described. Various techniques described herein provide a preamble design using one or more symbols. One or more preamble symbols may be interspersed within a header portion of a PLC frame to facilitate estimation of a frame boundary and/or sampling frequency offset, for example, in the presence of impulsive noise.
    Type: Application
    Filed: June 23, 2021
    Publication date: October 14, 2021
    Inventors: Anand G. Dabak, Badri N. Varadarajan, Il Han Kim, Tarkesh Pande
  • Publication number: 20210266039
    Abstract: In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line.
    Type: Application
    Filed: May 10, 2021
    Publication date: August 26, 2021
    Inventors: Badri N Varadarajan, Anand Dabak, II Han Kim
  • Patent number: 11082541
    Abstract: Methods for building, transmitting, and receiving frame structures in power line communications (PLC) are described. Various techniques described herein provide a preamble design using one or more symbols. One or more preamble symbols may be interspersed within a header portion of a PLC frame to facilitate estimation of a frame boundary and/or sampling frequency offset, for example, in the presence of impulsive noise.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: August 3, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Anand G. Dabak, Badri N Varadarajan, Il Han Kim, Tarkesh Pande
  • Patent number: 11005530
    Abstract: In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: May 11, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Badri N Varadarajan, Anand Dabak, Il Han Kim
  • Publication number: 20200153480
    Abstract: In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line.
    Type: Application
    Filed: January 16, 2020
    Publication date: May 14, 2020
    Inventors: Badri N Varadarajan, Anand Dabak, II Han Kim
  • Patent number: 10541727
    Abstract: In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: January 21, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Badri N Varadarajan, Anand Dabak, Il Han Kim
  • Publication number: 20190199402
    Abstract: In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line.
    Type: Application
    Filed: November 27, 2018
    Publication date: June 27, 2019
    Inventors: Badri N Varadarajan, Anand Dabak, II Han Kim
  • Patent number: 10277276
    Abstract: Systems and methods for application profiles and device classes in power line communications (PLCs) are described. In some embodiments, a PLC device has the device class defined by a PHY layer and may include a processor and a memory coupled to the processor. The memory may be configured to store program instructions, which may be executable by the processor to cause the PLC device to communicate with a higher-level PLC apparatus over a power line using a frequency band. The frequency band may be selected based upon an application profile and/or a device class associated with the PLC device. In some implementations, the higher-level PLC apparatus may include a PLC gateway or a data concentrator, and the PLC device may include a PLC modem or the like. Examples of application profiles include access communications, in-premises connectivity, AC charging, and/or DC charging. Device classes may represent a minimum communication data rate and/or an operating frequency band restriction of the PLC device.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: April 30, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Il Han Kim, Anand G. Dabak, Badri N Varadarajan
  • Patent number: 10141978
    Abstract: In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: November 27, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Badri N Varadarajan, Anand Dabak, II Han Kim
  • Publication number: 20180159594
    Abstract: In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line.
    Type: Application
    Filed: October 27, 2017
    Publication date: June 7, 2018
    Inventors: Badri N Varadarajan, Anand Dabak, II Han Kim