Abstract: A method and apparatus are disclosed for reclaiming frame buffers used to store data frames received by a network switch. The apparatus includes a multicopy queue for queuing entries corresponding to received data frames which must be transmitted by multiple output ports of the network switch, a free buffer queue for queuing frame pointers that identify locations in an external memory where reclaimed frame buffers are located, and a multicopy circuit that retrieves entries from the multicopy queue and determines if all copies of a received data frame have been transmitted by the specified output ports. The multicopy circuit also reclaims one or more frame buffers, based on the size of the received data frame. The present invention allows efficient reclaiming of frame buffers regardless of whether the received data frame is stored in a single frame buffer or multiple frame buffers.

Abstract: A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol dynamically allocates external memory bandwidth slots between high data rate ports. An external memory interface determines if a high data rate port makes a request for a bandwidth slot and grants the request if made. The slot is taken from a selected group which is a subset of the total number of slots. If a request for the slot is not made, the external memory interface assigns the slot to another high data rate port. Lower data rate ports in the network switch are assigned fixed slots from those slots not from within the selected group of slots. The dynamic allocation of bandwidth slots between the high data rate port enables the efficient use of limited memory bandwidth resources.

Abstract: A method and arrangement for queuing data in a prioritized manner has a queue with a single queue write side in which data entries are input to the queue. The queue also has a plurality of queue read sides, with each read side having a different priority level. An entry exiting from the queue write side is examined to determine the priority level of the entry, and then placed into the queue read side with the matching priority level as the entry. The queue read sides form the output of the queue, and are polled and emptied so that the higher priority queues are emptied completely before emptying lower priority queues.

Abstract: An apparatus for maintaining copy information pertaining to data frames received by a multiport switch that forwards received data frames to plural output ports includes a random access storage area and a control logic, both of which are located on the switch. The random access storage area stores a copy number that indicates the number of output ports that have not yet transmitted their copy of a designated data frame. The control logic addresses specific fixed locations within the random access storage area using frame pointers that identify where the received data frames are stored in an external memory. The information maintained in the random access storage area is accessible to all components of the multiport switch.

Abstract: A non-blocking network switch arrangement of plural network switches provides a single, shared external memory for the network switches. Each network switch in the arrangement may write data frames to a respective predetermined portion of the external memory allocated to each switch. When accessing the external memory, each network switch may access any portion of the external memory to transfer data frames to other network stations. Thus, data frames are accessed by each switch in the arrangement directly from the single, shared external memory, thereby eliminating the potential for blocking due to transfer of data frames from the memory of one switch to the memory of another switch.

Abstract: A host channel adapter is configured for efficiently managing multiple queue pairs by compressing queue pairs having similar properties into queue pair tables configured for storing compressed queue pair entries having shared attributes. Hence, multiple virtual queue pairs can be created out of fewer physical queue pairs stored within a queue pair attribute database.

Abstract: A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol that allocates a prescribed number of external memory bandwidth slots between high data rate ports based on the compared amount of network traffic on the respective ports. A scheduler within an external memory interface initially assigns memory access slots to the respective high data rate ports according to a prescribed sequence. If the scheduler subsequently detects that the network data traffic on a port having less slots is higher than the traffic on a port having more slots, the slots are swapped between the high data rate ports. Additionally, a clock multiplexer in one of the high data rate ports adjusts the data rate of the port dependent upon the number of slots assigned to that port.

Abstract: A network device that controls the communication of data frames between stations receives data frames having different levels of priority. The network device identifies the levels of priority and processes the frames based on the priority level. When a congestion condition associated with a resource on the network device occurs, the network device generates a pause frame that includes a priority indicator and transmits the pause frame to at least one station. When a receiving station receives the pause frame, the receiving station suspends transmission of data frames having a priority corresponding to the priority indicator and continues transmitting frames having other priorities.

Abstract: An apparatus and method are disclosed for regulating the flow of data between plural network stations through a network switch. A receive port functions to receive data frames from a first network station, and a transmit port outputs the received data frames to a second network station. A programmable threshold register is provided for storing a threshold value that indicates a saturation level for the internal resources of the transmit port. Control circuitry is used to monitor the internal resources of the transmit port and determine whether or not the threshold value has been reached. If the threshold value has been reached, then the control circuitry will implement a flow control process that causes the first network station to discontinue transmission of data frames to the transmit port until the internal resources of the transmit port fall below the threshold value.

Abstract: A programmable split-queue structure includes a first queue area for receiving entries, a second queue area for outputting entries input to said first queue area, and a queue overflow engine logically coupled to the first queue area and the second queue area. The queue overflow engine functions to transfer entries from the first queue area to the second queue area using one of two transfer modes. The queue overflow engine selects the most appropriate transfer mode based on a prescribed threshold value that can be dynamically programmed. An overflow storage area having high capacity may be provided in an external memory in order to increase the overall capacity of the queue structure.

Abstract: A method and arrangement for reclaiming buffers used to store frames, following the transmission of a frame, checks to determine whether the transmission of a frame is the last copy of that frame to be transmitted. If it is the last copy, or the only copy, the buffers storing that frame are reclaimed for reuse after the contents of each buffer are transmitted. If the frame is not the last copy, or it cannot be determined whether it is the last copy, then the frame is transmitted and a count of the number of transmitted copies of that frame is decremented. Once all of the copies have been transmitted, the buffer reclaiming process is initiated.

Abstract: A resetting, enabling and freezing system is provided for controlling a communication device in a diagnostic process. A hardware reset of the device may be performed by a host via a reset pin of a PCI interface. A software reset of the device may be provided by setting a reset bit in a command register. To stop operations of the device substantially instantaneously, a freeze mode of diagnostics is provided. The freeze mode may be initiated using hardware or software freezing. To provide the hardware freezing, diagnostic logic is supplied with a freeze signal via a freeze pin of the PCI interface. The software freezing is performed by setting a freeze bit in the command register. To enable a diagnostician to reproduce an event causing an error, an enable/disable mode of diagnostics is carried out. In this mode, elements of the device are disabled one after another in a serial fashion, with a disable signal being passed serially from one element to another.

Abstract: A network switch having a shared memory architecture for storing data frames has a set of programmable thresholds that specify when flow control should be initiated on a selected network port. The network switch includes a queue for storing free frame pointers, each specifying available memory locations in an external memory for storing data frames received from a network station. The network switch takes a frame pointer from a free buffer queue for each received data frame, and stores the received data frame in the location in external memory specified by the frame pointer while a decision making engine within the switch determines the appropriate destination ports.

Abstract: A method and arrangement for maintaining a time order of entries in a memory determines a row in which the entry will be stored, the memory being logically divided into rows and columns. The columns are arranged sequentially in each row from the newest to the oldest. Once the row in which the entry will be stored is determined, the entry is stored in that row in the column (or entry location) that is the newest column. The entry that was previously in the newest column is shifted to the next older column, and the entry that was previously in the next older column is shifted to the next most older column, etc. If a row is completely filled prior to the writing of a new entry, then the entry in the oldest column is removed from the memory and the other entries shifted.

Abstract: A network having a shared memory architecture for storing data frames has a set of programmable thresholds that specify when flow control should be initiated on full-duplex network ports. The network switch includes a queue for storing free frame pointers that specify available memory locations in an external memory for storing data frames received from a network station. The network switch takes a frame pointer from a free buffer queue for each received data frame, and stores the received data frame in the location in external memory specified by the frame pointer while a decision making engine within the switch determines the appropriate destination ports. Flow control is initiated based on the number of available frame pointers by transmitting a PAUSE frame having a selected PAUSE interval to a transmitting network station.

Abstract: A method and arrangement for transmitting multiple copies of a frame from a network switch in a packet switched network stores a single copy of the frame received at the switch into external memory. The frame is stored at a location in memory pointed to by a frame pointer. In queuing multiple transmissions of the stored frame in the switch, the frame pointer, and not the frame itself, is replicated and queued for transmission in the network switch.

Abstract: A method and arrangement for initiating forwarding of data from a device having multiple receive and transmit ports as a function of the data received at the device includes a plurality of ports for receiving and transmitting data. A port vector FIFO forwards a data identifier to initiate forwarding from at least one of the ports of a received set of data. A holding area is controlled by the port vector FIFO and receives data identifiers and holds these data identifiers until released by the port vector FIFO. The release of a data identifier initiates the forwarding of the data, and each data identifier uniquely identifies each set of data received at the device. The port vector FIFO, upon receiving a data identifier, uses the data identifier to determine the receive port that is receiving the set of data identified by the data identifier.

Abstract: An interface device enables an external device connected to a network switch to be disabled. The interface device receives and transmits data to an external device which makes data forwarding decisions. When a disable signal is received by the network switch, the disable signal is transmitted to the external device over an existing data path. The external device returns an acknowledgement signal over an existing path to the switch. A timer is included as a failsafe mechanism in case the external device does not return an acknowledge signal. The timer waits a predetermined period of time and continues the shut down of the network switch as if the acknowledge signal was received.

Abstract: An integrated multiport switch (IMS) in which an on-chip management information base (MIB) accumulation processor enables monitoring of a significantly larger number of MIB objects to be stored in external memory while minimizing media access controller (MAC) complexity. A MAC for each port in the IMS outputs a MIB report for each transmission or reception of data according to a specific encoded format to a MIB engine. The MIB engine decodes the MIB report into a plurality of associated MIB objects, which are temporarily accumulated until the external memory is updated. The MIB engine initiates the stored MIB value updating process by retrieving the values from the external memory and adding the accumulated MIB objects to the retrieved values. The updated MIB objects are then transmitted back to the external memory for storage therein and the MIB engine object values are reset.

Abstract: An interface for use in a data forwarding device is connected between the receive ports and transmit ports of a device. The interface ensures that data being forwarded from a receive port to a transmit port has actually been received. The interface includes a queuing circuit and a de-queuing circuit. The queuing circuit receives data from the receive port, identifies the receive port, counts the data received, and buffers the data. The de-queuing circuit retrieves the buffered data at a scheduled time based on the receive port's mode, and forwards the data to a transmit port provided that the amount of data received by the queuing circuit is at least as great as the amount of data already forwarded by the de-queuing circuit plus a threshold safe level amount of data.