Patents by Inventor Bang C. Nguyen
Bang C. Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10379741Abstract: Implementations disclosed herein provide for increasing storage drive performance by reserving a region of user-writeable storage space on a storage medium for overprovisioning uses, including performance-enhancing functions. Until a capacity condition of the storage drive is satisfied, write operations targeting the reserved region are written to another equal-sized region that does not contain user data.Type: GrantFiled: April 17, 2014Date of Patent: August 13, 2019Assignee: SEAGATE TECHNOLOGY LLCInventors: Daniel J. Sokolov, Bang C. Nguyen, Andrew M. Kowles, Cameron S. McGary, Adam J. Weikal, Brian T. Edgar
-
Publication number: 20150301747Abstract: Implementations disclosed herein provide for increasing storage drive performance by reserving a region of user-writeable storage space on a storage medium for overprovisioning uses, including performance-enhancing functions. Until a capacity condition of the storage drive is satisfied, write operations targeting the reserved region are written to another equal-sized region that does not contain user data.Type: ApplicationFiled: April 17, 2014Publication date: October 22, 2015Applicant: Seagate Technology LLCInventors: Daniel J. Sokolov, Bang C. Nguyen, Andrew M. Kowles, Cameron S. McGary, Adam J. Weikal, Brian T. Edgar
-
Patent number: 7530880Abstract: A pad for CMP operations includes a guide plate having a plurality of holes therein and being affixed to a compressible under-layer; and a plurality of pressure-sensing and process monitoring polishing elements each affixed to the compressible under-layer and passing through a corresponding hole in the guide plate so as to be maintained in a substantially vertical orientation with respect to the compressible under-layer but being translatable in a vertical direction with respect to the guide plate.Type: GrantFiled: October 5, 2005Date of Patent: May 12, 2009Assignee: Semiquest Inc.Inventors: Rajeev Bajaj, Natraj Narayanswami, Bang C. Nguyen
-
Publication number: 20080268760Abstract: A pad for CMP operations includes a guide plate having a plurality of holes therein and being affixed to a compressible under-layer; and a plurality of pressure-sensing and process monitoring polishing elements each affixed to the compressible under-layer and passing through a corresponding hole in the guide plate so as to be maintained in a substantially vertical orientation with respect to the compressible under-layer but being translatable in a vertical direction with respect to the guide plate.Type: ApplicationFiled: October 5, 2005Publication date: October 30, 2008Inventors: Rajeev Bajaj, Natraj Narayanswami, Bang C. Nguyen
-
Patent number: 6663713Abstract: A method and apparatus are disclosed for forming thin polymer layers on semiconductor substrates. In one embodiment, the method and apparatus include the vaporization of stable di-pxylylene, the pyrolytic conversion of such gaseous dimer material into reactive monomers, and the optional blending of the resulting gaseous p-xylylene monomers with one or more polymerizable materials in gaseous form capable of copolymerizing with the p-xylylene monomers to form a low dielectric constant polymerized parylene material. An apparatus is also disclosed which provides for the distribution of the polymerizable gases into the deposition chamber, for cooling the substrate down to a temperature at which the gases will condense to form a polymerized dielectric material, for heating the walls of the deposition chamber to inhibit formation and accumulation of polymerized residues thereon, and for recapturing unreacted monomeric vapors exiting the deposition chamber.Type: GrantFiled: October 22, 1996Date of Patent: December 16, 2003Assignee: Applied Materials Inc.Inventors: Stuardo A. Robles, Visweswaren Sivaramakrishnan, Bang C. Nguyen, Gayathri Rao, Gary Fong, Vicente Lam, Peter Wai-Man Lee, Mei Chang
-
Patent number: 6319324Abstract: A method and apparatus for reducing surface sensitivity of a TEOS/O3 SACVD silicon oxide layer, formed over a substrate, that deposits a ramp layer while ramping pressure to a target deposition pressure and deposits an SACVD layer over the ramp layer. In one embodiment, the flow of ozone is stopped during the pressure ramp-up to control the thickness of the ramp layer.Type: GrantFiled: September 14, 2000Date of Patent: November 20, 2001Assignee: Applied Materials, Inc.Inventors: Bang C. Nguyen, Shankar Vankataranan, Ruby Liao, Peter W. Lee
-
Patent number: 6149974Abstract: A method and apparatus for reducing surface sensitivity of a TEOS/O.sub.3 SACVD silicon oxide layer, formed over a substrate, that deposits a ramp layer while ramping pressure to a target deposition pressure and deposits an SACVD layer over the ramp layer. In one embodiment, the flow of ozone is stopped during the pressure ramp-up to control the thickness of the ramp layer.Type: GrantFiled: May 5, 1997Date of Patent: November 21, 2000Assignee: Applied Materials, Inc.Inventors: Bang C. Nguyen, Shankar Vankataranan, Ruby Liao, Peter W. Lee
-
Patent number: 6047713Abstract: An improved method of in-situ cleaning a throttle valve in a CVD device and exhaust flow control apparatus for facilitating such cleaning. The throttle valve is repositioned such that it is juxtaposed in close proximity to the exhaust gas port of the reaction chamber. A plasma is then ignited in a cleaning gas mixture of nitrogen trifluoride, hexafluoroethane and oxygen.Type: GrantFiled: February 3, 1994Date of Patent: April 11, 2000Assignee: Applied Materials, Inc.Inventors: Stuardo A. Robles, Thanh Pham, Bang C. Nguyen
-
Patent number: 5958510Abstract: A method and apparatus are disclosed for forming thin polymer layers on semiconductor substrates. In one embodiment, the method and apparatus include the sublimation of stable dimer parylene material, the pyrolytic conversion of such gaseous dimer material into reactive monomers, and for the optional blending of the resulting gaseous parylene monomers with one or more polymerizable materials in gaseous form capable of copolymerizing with the parylene monomers to form a low dielectric constant polymerized parylene material. An apparatus is also disclosed which provides for the distribution of the polymerizable gases into the deposition chamber, for cooling the substrate down to a temperature at which the gases will condense to form a polymerized dielectric material, for heating the walls of the deposition chamber to inhibit formation and accumulation of polymerized residues thereon, and for recapturing unreacted monomeric vapors exiting the deposition chamber.Type: GrantFiled: January 8, 1996Date of Patent: September 28, 1999Assignee: Applied Materials, Inc.Inventors: Visweswaren Sivaramakrishnam, Bang C. Nguyen, Gayathri Rao, Stuardo Robles, Gary L. Fong, Vicente Lim, Peter W. Lee
-
Patent number: 5707451Abstract: An improved method of in-situ cleaning a throttle valve in a CVD device and exhaust flow control apparatus for facilitating such cleaning. The throttle valve is repositioned such that it is juxtaposed in close proximity to the exhaust gas port of the reaction chamber. A plasma is then ignited in a cleaning gas mixture of nitrogen trifluoride, hexafluoroethane and oxygen.Type: GrantFiled: May 25, 1995Date of Patent: January 13, 1998Assignee: Applied Materials, Inc.Inventors: Stuardo A. Robles, Thanh Pham, Bang C. Nguyen
-
Patent number: 5648175Abstract: A method of and apparatus for depositing a silicon oxide layer onto a wafer or substrate is provided. The present method includes introducing into a processing chamber a process gas including silicon, oxygen, boron, phosphorus and germanium to form a germanium doped BPSG oxide layer having a reflow temperature of less than 800.degree. C. Preferred embodiments of the present method are performed in either a subatmospheric CVD or a plasma enhanced CVD processing apparatus.Type: GrantFiled: February 14, 1996Date of Patent: July 15, 1997Assignee: Applied Materials, Inc.Inventors: Kathleen Russell, Stuardo Robles, Bang C. Nguyen, Visweswaren Sivaramakrishnan
-
Patent number: 5570332Abstract: The present invention is a method for decreasing rotational latency in systems which include a data retrieval element and a rotating medium. The method requires that the rotating medium be divided into a plurality of discrete angular regions. For each discrete angular region, a number of cylinders that may be traversed by the data retrieval element during a single revolution of the medium is identified. A rotational latency assigned to each discrete angular region based on a current location of the retrieval element. A command queue array is searched for a command that addresses a location within a range of cylinders determined by the number of cylinders in the discrete angular region having the smallest rotational latency. Finally, the command addressing a location in the range of cylinders in the selected discrete angular region of the medium is executed.Type: GrantFiled: May 25, 1995Date of Patent: October 29, 1996Assignee: Seagate Technology, Inc.Inventors: Mark A. Heath, D. Christopher Pruett, Bang C. Nguyen
-
Patent number: 5431772Abstract: A two step method of etching a silicon nitride layer carrying a surface oxygen film from a substrate in a plasma reactor employs the steps of (1) a breakthrough step of employing a plasma of oxygen free etchant gases to break through and to remove the surface oxygen containing film from the surface of the silicon nitride layer, and (2) a main step of etching the newly exposed silicon nitride with etchant gases having high selectivity with respect to the silicon oxide underlying the silicon nitride. The plasma etching can be performed while employing magnetic- enhancement of the etching. The plasma etching is performed in a plasma reactor comprising a low pressure, single wafer tool. Plasma etching is performed while employing magnetic-enhancement of the etching. The etchant gases include a halide such as a bromide and a fluoride in the breakthrough step. The etchant gases include an oxygen and bromine containing gas in the main step.Type: GrantFiled: October 19, 1992Date of Patent: July 11, 1995Assignee: International Business Machines CorporationInventors: Wayne T. Babie, Kenneth L. Devries, Bang C. Nguyen, Chau-Hwa J. Yang
-
Patent number: 5188704Abstract: A two step method of etching a silicon nitride layer carrying a surface oxygen film from a substrate in a plasma reactor employs the steps of (1) a breakthrough step of employing a plasma of oxygen free etchant gases to break through and to remove the surface oxygen containing film from the surface of the silicon nitride layer, and (2) a main step of etching the newly exposed silicon nitride with etchant gases having high selectivity with respect to the silicon oxide underlying the silicon nitride. The plasma etching can be performed while employing magnetic-enhancement of the etching. The plasma etching is performed in a plasma reactor comprising a low pressure, single wafer tool. Plasma etching is performed while employing magnetic-enhancement of the etching. The etchant gases include a halide such as a bromide and a fluoride in the breakthrough step. The etchant gases include an oxygen and bromine containing gas in the main step.Type: GrantFiled: May 9, 1991Date of Patent: February 23, 1993Assignee: International Business Machines CorporationInventors: Wayne T. Babie, Kenneth L. Devries, Bang C. Nguyen, Chau-Hwa J. Yang