Abstract: Methods, apparatus and systems for generating verifiable conflict-free flight plans for aircraft are disclosed. In an embodiment, a server computer receives a set of air traffic flight plans for an airspace that includes elements, and receives at least two of aerodynamic constraint data, business constraint data and operational constraint data for an aircraft. The server computer then generates using a first constraint satisfaction solver, a plurality of candidate flight plans for the aircraft based on the at least two of the aerodynamic constraint data, the business constraint data and the operational constraint data. The server computer next checks, utilizing a second constraint solver, for conflicts with the elements of the air traffic flight plans for the airspace, and provides at least one verifiable conflict-free flight plan for the aircraft from the plurality of candidate flight plans when a candidate flight plan is conflict-free from all of the elements of the set of air traffic flight plans.

Abstract: A computer-implemented system for generating test cases and/or test procedures to verify software having a nonlinear arithmetic constraint over a Real number range. The system includes a translator that receives, as input, software specification models for the software to be verified. The translator is configured to generate, as output, a plurality of SMT formulas that are semantically equivalent to the software specification models. The system includes an analytical engine pool that receives, as input, the plurality of SMT formulas from the translator and analyzes the plurality of SMT formulas, and generates, as output, test case data for each of the plurality of SMT formulas determined to be satisfiable. The system includes a post-processor that receives, as input, the test case data from the analytical engine pool and generates, as output, the test cases and/or test procedures for the software to be verified based on the test case data.

Abstract: A computer-implemented system for generating test cases and/or test procedures to verify software having a nonlinear arithmetic constraint over a Real number range. The system includes a translator that receives, as input, software specification models for the software to be verified. The translator is configured to generate, as output, a plurality of SMT formulas that are semantically equivalent to the software specification models. The system includes an analytical engine pool that receives, as input, the plurality of SMT formulas from the translator and analyzes the plurality of SMT formulas, and generates, as output, test case data for each of the plurality of SMT formulas determined to be satisfiable. The system includes a post-processor that receives, as input, the test case data from the analytical engine pool and generates, as output, the test cases and/or test procedures for the software to be verified based on the test case data.