Abstract: An example electronic device includes a storage circuit, a central processing unit (CPU) coupled to the storage circuit, and a controller coupled to the storage circuit. The CPU is to receive a Basic Input/Output System (BIOS) update image for the electronic device, verify a signature of the BIOS update image, and responsive to verification of the BIOS update image, store a portion of the BIOS update image in the storage circuit. The controller is to obtain the portion of the BIOS update image from the storage circuit, and program the portion of the BIOS update image to a BIOS component of the electronic device.

Abstract: An example non-transitory computer readable storage medium comprising instructions that when executed cause a processor of a computing device to: in response to a trigger of a system management mode (SMM), verify all processor threads have been pulled into the SMM; in response to a successful verification, enable write access to a non-volatile memory of the computing device via two registers, where the writing access is disabled upon booting of the computing device; and upon exiting the SMM, disable the write access via the two registers.

Abstract: An example non-transitory computer readable storage medium comprising instructions that when executed cause a processor of a computing device to: in response to a trigger of a system management mode (SMM), verify all processor threads have been pulled into the SMM; in response to a successful verification, enable write access to a non-volatile memory of the computing device via two registers, where the writing access is disabled upon booting of the computing device; and upon exiting the SMM, disable the write access via the two registers.

Abstract: A computer system includes an independent compute core; and an isolated secure data storage device to store data accessible only to the independent compute core. The independent compute core is to open an Application Program Interface (API) during runtime of the computer system in response to receiving a verified message containing secure data to be written to the secure data storage device.

Abstract: In some examples, a device includes a memory, a processor, and a controller separate from the processor to derive a security credential based on information comprising a key accessible by the controller. The controller communicates the derived security credential in a secure manner to a program code executable on the processor, and uses the derived security credential to protect data stored in the memory against unauthorized access.

Abstract: The update progress of a basic input/output system (BIOS) is displayed on a display screen. A first chipset lock is applied to a first region of a shared serial peripheral interface (SPI) chip of the BIOS of a computer system containing a first program of instructions. A system management memory mode lock is applied to a second and a third region of the shared SPI chip containing a second and third programs of instructions respectively. The second program of instructions is updated, and control of the BIOS is transferred to the updated second program of instructions. The updated second program of instructions updates the first program of instructions. The BIOS update progress visual is displayed on the display screen of the computer system while updating the first program of instructions.

Abstract: According to examples, an apparatus may include a memory storing a firmware and a processor. The processor may receive a request to modify the firmware, in which the request may be associated with a first credential. The processor may also determine, based on the first credential, whether modification of the firmware is authorized and based on a determination that modification of the firmware is authorized, display a set of defined functionalities for the firmware that are authorized to be modified. The processor may further receive a modification to a functionality in the set of defined functionalities that are authorized to be modified and may apply the received modification to the functionality.

Abstract: In some examples, a device includes a memory, a processor, and a controller separate from the processor to derive a security credential based on information comprising a key accessible by the controller. The controller communicates the derived security credential in a secure manner to a program code executable on the processor, and uses the derived security credential to protect data stored in the memory against unauthorized access.

Abstract: Examples associated with boot data validity are described. One example includes determining whether NVRAM boot data structure is valid. When the NVRAM boot data structure is valid, a NVRAM boot data structure validity flag is set to indicate the boot data structure is invalid. The validity flag is set to indicate the NVRAM boot data structure is valid once a point in a startup process is reached that indicates the startup process will complete successfully. When the NVRAM boot data structure is invalid, errors identified in the NVRAM boot data structure are repaired, and the startup process is restarted.

Abstract: Examples associated with boot data validity are described. One example includes determining whether NVRAM boot data structure is valid. When the NVRAM boot data structure is valid, a NVRAM boot data structure validity flag is set to indicate the boot data structure is invalid. The validity flag is set to indicate the NVRAM boot data structure is valid once a point in a startup process is reached that indicates the startup process will complete successfully. When the NVRAM boot data structure is invalid, errors identified in the NVRAM boot data structure are repaired, and the startup process is restarted.

Abstract: The update progress of a basic input/output system (BIOS) is displayed on a display screen. A first chipset lock is applied to a first region of a shared serial peripheral interface (SPI) chip of the BIOS of a computer system containing a first program of instructions. A system management memory mode lock is applied to a second and a third region of the shared SPI chip containing a second and third programs of instructions respectively. The second program of instructions is updated, and control of the BIOS is transferred to the updated second program of instructions. The updated second program of instructions updates the first program of instructions. The BIOS update progress visual is displayed on the display screen of the computer system while updating the first program of instructions.

Abstract: Example embodiments disclosed herein relate to backing up firmware. An operating system can be initialized. During the initialization process, memory can be set. The firmware can be backed up to storage based on the set memory.

Abstract: Examples herein disclose receiving a basic input output system (BIOS) policy change and authorizing the BIOS policy change. Upon the authorization of the BIOS policy change, a first copy of the BIOS policy is stored in a first memory accessible by a central processing unit. Additionally, a second copy of the BIOS policy change is transmitted for storage in a second memory electrically isolated from the central processing unit.

Abstract: A second physical-address-dependent code is generated from a first physical-address-dependent code using differential data, where the generating comprises converting a first physical address in a region of the first physical-address-dependent code to a second, different physical address for inclusion in a corresponding region of the second physical-address-dependent code.

Abstract: Examples herein disclose receiving a basic input output system (BIOS) policy change and authorizing the BIOS policy change. Upon the authorization of the BIOS policy change, a first copy of the BIOS policy is stored in a first memory accessible by a central processing unit. Additionally, a second copy of the BIOS policy change is transmitted for storage in a second memory electrically isolated from the central processing unit.

Abstract: Examples herein disclose receiving a basic input output system (BIOS) policy change and authorizing the BIOS policy change. Upon the authorization of the BIOS policy change, a first copy of the BIOS policy is stored in a first memory accessible by a central processing unit. Additionally, a second copy of the BIOS policy change is transmitted for storage in a second memory electrically isolated from the central processing unit.

Abstract: A computer system includes an independent compute core; and an isolated secure data storage device to store data accessible only to the independent compute core. The independent compute core is to open an Application Program Interface (API) during runtime of the computer system in response to receiving a verified message containing secure data to be written to the secure data storage device.

Abstract: It is determined whether an updated first boot phase code is present. The updated first boot phase code is validated. In response to the validating, a current version of the first boot phase code is updated using the updated first boot phase code.

Abstract: Example embodiments disclosed herein relate to backing up firmware. An operating system can be initialized. During the initialization process, memory can be set. The firmware can be backed up to storage based on the set memory.

Abstract: Examples herein disclose receiving a basic input output system (BIOS) policy change and authorizing the BIOS policy change. Upon the authorization of the BIOS policy change, a first copy of the BIOS policy is stored in a first memory accessible by a central processing unit. Additionally, a second copy of the BIOS policy change is transmitted for storage in a second memory electrically isolated from the central processing unit.