Abstract: A method for locally removing/modifying a polymer material on a surface of a wafer. The method includes: a) aligning a mask with respect to the surface; b) locally exposing the surface through the mask using a VUV light source while simultaneously supplying a gas mixture containing at least oxygen; c) purging the surface with a gas mixture containing at least nitrogen and oxygen, the VUV light source being switched off; and d) repeating at least steps b) and c) until the removal/modification is complete. A device is described for locally removing/modifying a polymer material on a surface of a wafer, including a mask. The device includes an adjustable wafer table for holding the wafer, and is configured to set an exposure gap between the wafer and the mask in a first operating state, and to set a purge gap between the wafer and the mask in a second operating state.

Abstract: A method is described for creating at least one recess in a semiconductor component, in particular a micromechanical or electrical semiconductor component, having the following steps: applying at least one mask to the semiconductor component, forming at least one lattice having at least one or more lattice openings in the mask over the recess to be formed, the lattice opening or lattice openings being formed as a function of the etching rate and/or the dimensioning of the recess to be formed; forming the recess below the lattice.

Abstract: A method is described for creating at least one recess in a semiconductor component, in particular a micromechanical or electrical semiconductor component, having the following steps: applying at least one mask to the semiconductor component, forming at least one lattice having at least one or more lattice openings in the mask over the recess to be formed, the lattice opening or lattice openings being formed as a function of the etching rate and/or the dimensioning of the recess to be formed; forming the recess below the lattice.

Abstract: A semiconductor system having a pn transition and a method for manufacturing a semiconductor system are disclosed. The semiconductor system is designed in the form of a chip having an edge region, the semiconductor system includes a first layer of a first conductivity type and a second layer of a second conductivity type, which is of opposite polarity to the first conductivity type. The first layer has an edge region and a center region, the pn transition being provided between the first layer and the second layer. The second layer is more weakly doped in its edge region than in its center region, and the boundary surface of the pn transition at the edge region is non-parallel to the main chip plane.

Abstract: A converter module is described having a positive terminal (2), a negative terminal (4), and a phase terminal (3), as well as a first semiconductor chip (9) and a second semiconductor chip (9), the terminals (2-4) and the semiconductor chips (9) being situated on top of one another in a stack. A particularly simple and cost-effective converter module may produced in that the positive terminal (2), the negative terminal (4), or the phase terminal (3) are made up of a contact plate (5), including a bar-shaped terminal lug (6) which is positioned asymmetrically on the contact plate (5), and an auxiliary element (7) is provided at its end which prevents the terminal (2-4) from tilting.

Abstract: A method is proposed for fastening at least one electrical component to a substrate using solder, in which elevations are produced in the solder substrate, the elevations being at least as high as the thickness of a solder layer to be produced. In another step, the solder is laid upon the elevations, and in a further step, the elevations are pressed down until they have reached approximately the height of the solder, so that a soldering procedure may follow. The method is used for producing exactly specified thicknesses of solder layers having tolerances less than 10 micrometers.

Abstract: A semiconductor system having a pn transition and a method for manufacturing a semiconductor system are disclosed. The semiconductor system is designed in the form of a chip having an edge region, the semiconductor system includes a first layer of a first conductivity type and a second layer of a second conductivity type, which is of opposite polarity to the first conductivity type. The first layer has an edge region and a center region, the pn transition being provided between the first layer and the second layer. The second layer is more weakly doped in its edge region than in its center region, and the boundary surface of the pn transition at the edge region is non-parallel to the main chip plane.

Abstract: A method is proposed for producing semiconductor components, in which at least one doped region is introduced in a wafer, a solid glass layer provided with dopant being applied on at least one of the two sides of a semiconductor wafer, in another step, the wafer being heated to high temperatures so that the dopant from the glass layer penetrates deep into the wafer to produce the at least one doped region; and in a further step, the glass layer being removed. The method is used for producing homogeneous, heavily doped regions, it also being possible to introduce these regions in the wafer on both sides and for the regions to be of different doping type.

Abstract: A method is proposed for fastening at least one electrical component to a substrate using solder, in which elevations are produced in the solder substrate, the elevations being at least as high as the thickness of a solder layer to be produced, in a further step the solder, especially a solder foil, is laid upon the elevations, and in a further step, the elevations are pressed down until they have reached approximately the height of the solder, so that a soldering procedure may follow. The method is used for producing exactly specified thicknesses of solder layers having tolerances less than 10 micrometer.

Abstract: It is proposed to implement the emitter short-circuit structure of a multilayer diode by providing grooves which cut through topmost layer 2 of the multilayer diode. A metal layer 20 applied thereon electrically shorts the topmost layer to subjacent layer 3.