Patents by Inventor Barish Chakravarty

Barish Chakravarty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230066792
    Abstract: A digital microfluidic (DMF) system based on an electrowetting-on-dielectric mechanism includes a substrate, and at least one dielectric layer comprising diamond-like carbon over the substrate. The DMF system also includes a plurality of electrodes connected to the dielectric layer. A voltage source is selectively couplable to different electrodes of the plurality of electrodes.
    Type: Application
    Filed: July 7, 2022
    Publication date: March 2, 2023
    Inventors: Xiong Liu, Barish Chakravarty, Lihong Zhang, Akhil Namboori, Hui Ning Tan
  • Patent number: 7240250
    Abstract: A method and apparatus for characterizing whether a head of a data storage device exhibits excessive performance degradation. The device includes a data transducing head adjacent a recording medium, and read channel circuitry with a variable gain amplifier (VGA) and gain control block. The gain control block supplies VGA gain control values to the VGA to nominally maintain amplitudes of readback signals obtained from the head within a selected range suitable for remaining portions of the read channel circuitry. A baseline VGA gain control value is first obtained, after which the read channel is parametrically adapted to optimize read error performance. An adaptive VGA gain control value is thereafter obtained, and head degradation is determined in relation to the magnitude of the adaptive VGA gain control value as well as in relation to a difference between the VGA gain control value and the baseline value.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: July 3, 2007
    Assignee: Seagate Technology LLC
    Inventors: Shau Yann Lea, Jeremy Garci Olanda, Yeong Heng Tan, Barish Chakravarty
  • Publication number: 20040044939
    Abstract: A method and apparatus for characterizing whether a head of a data storage device exhibits excessive performance degradation. The device includes a data transducing head adjacent a recording medium, and read channel circuitry with a variable gain amplifier (VGA) and gain control block. The gain control block supplies VGA gain control values to the VGA to nominally maintain amplitudes of readback signals obtained from the head within a selected range suitable for remaining portions of the read channel circuitry. A baseline VGA gain control value is first obtained, after which the read channel is parametrically adapted to optimize read error performance. An adaptive VGA gain control value is thereafter obtained, and head degradation is determined in relation to the magnitude of the adaptive VGA gain control value as well as in relation to a difference between the VGA gain control value and the baseline value.
    Type: Application
    Filed: June 10, 2003
    Publication date: March 4, 2004
    Inventors: Shau Yann Lea, Jeremy Garci Olanda, Yeong Heng Tan, Barish Chakravarty