Patents by Inventor Barry Caldwell

Barry Caldwell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180038089
    Abstract: An apparatus, system and method for a receptacle suitable for control, data collection, and remote management. An exemplary receptacle may include a basin for receiving at least one viscous element; at least one sensor physically associated with the basin; and at least one actuator responsive to the at least one sensor, wherein actuation of the actuator outputs the viscous element to the basin. The receptacle may further include a controller at least partially physically proximate to the basin and capable of controlling the actuation of the at least one actuator; and a control system communicative with the local controller over at least open data path, wherein the control system imposes a plurality of rules to the controller.
    Type: Application
    Filed: December 18, 2015
    Publication date: February 8, 2018
    Applicant: Jabil Circuit, Inc.
    Inventors: Barry CALDWELL, Gustavo SUAREZ
  • Patent number: 6769923
    Abstract: A fluted signal pin provides expanded surface area for high frequency operation which minimizes inductive and capacitive effects. The signal pin may be mounted to a circuit board via a support stanchion or membrane during assembly or repair. The membrane may be permanent or removable by heat, water, and/ or detergent. A pin cap optionally is provided to ensure attachment to an overlying integrated circuit package.
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: August 3, 2004
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6765806
    Abstract: The present invention is directed to a composition with electromagnetic compatibility (EMC) characteristics. In an aspect of the present invention, an adhesive suitable to provide a bond between components may include an adhering material suitable for holding a first surface and a second surface in contact. A plurality of items is disposed in the adhering material. The plurality of items has electromagnetic capability shielding characteristics.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: July 20, 2004
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6748469
    Abstract: The present invention is directed to a parallel/serial SCSI with legacy support. A small computer system interface (SCSI) converter module may include a small computer system interface (SCSI) converter. The converter is suitable for converting a parallel bus structure to a serial bus structure, and the converter is also suitable for supporting a parallel bus structure to a parallel bus structure.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: June 8, 2004
    Assignee: LSI Logic Corporation
    Inventors: Barry Caldwell, Craig C. McCombs
  • Publication number: 20030114026
    Abstract: A fluted signal pin provides expanded surface area for high frequency operation which minimizes inductive and capacitive effects. The signal pin may be mounted to a circuit board via a support stanchion or membrane during assembly or repair. The membrane may be permanent or removable by heat, water, and/ or detergent. A pin cap optionally is provided to ensure attachment to an overlying integrated circuit package.
    Type: Application
    Filed: December 17, 2001
    Publication date: June 19, 2003
    Inventor: Barry Caldwell
  • Patent number: 6573767
    Abstract: A power ground short circuit with adjustable activation delay and activation time period eliminates latent voltages in the power down/ off discharging circuitry. The circuit uses an internal back up power storage device to supply power on power down. A comparator determines when the power down condition occurs. Two timers are used to generate an activation signal for a charge pump. The charge pump is responsible for turning on a pair of transistors which bring the power bus voltage down to a zero level. A slew rate detector enables the comparator.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: June 3, 2003
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6563198
    Abstract: The present invention is directed to the present invention is directed to an adhesive pad with electromagnetic compatibility (EMC) characteristics. An adhesive pad suitable for bonding electrical components may include a thermal bonding adhesive material and a lattice interlayer. The adhesive material is suitable for being disposed between the first electrical component and the second component, the thermal bonding adhesive bonding the first electrical component to the second component. The lattice interlayer is included within said thermal bonding adhesive material, the lattice interlayer having electromagnetic capability (EMC) shielding characteristics.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: May 13, 2003
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6553166
    Abstract: A concentric optical cable and connector capable of full duplex transmission of optically encoded information is disclosed. The concentric optical cable comprises at least a core optical conductor suitable for conducting a light beam encoded with a first set of optically encoded information concentrically disposed about a concentric optical conductor suitable for conducting a light beam encoded with a second set of optically encoded information. The connector includes a first connector portion suitable for connection of the core optical conductor of the optical cable. The first connector portion is substantially concentrically disposed about a second connector portion suitable for connection of the concentric optical conductor of the optical cable thereby providing full duplex transmission of information. In this manner, the optical cable and connectors are capable of full duplex transmission of the first and second sets of optically encoded information.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: April 22, 2003
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6552907
    Abstract: The present invention is directed to a heat dissipation structure for an integrated circuit package, comprising a thermally conductive solid layers, one of which has receptacles for holding a thermally conductive flowable material, the heat dissipation structure being placed between the electronic component and the printed circuit board. The present invention is used advantageously with a primary heat sink placed on the top side of the integrated circuit package away from the printed circuit board. The heat dissipation structure preferably hemispherical balls on the package side of a high heat conductive plate to improve heat transfer from the die to the integrated circuit, especially, BGA, substrate to PCB power planes for heat dissipation and leads to improved secondary heat transfer from IC die in BGA packages to the heat spreader power planes in the system PCB. The heat dissipation device allows retro-fit of the heat transfer/transfer mechanism or primary attachment.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: April 22, 2003
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6496374
    Abstract: The present invention is directed to an apparatus suitable for mounting an integrated circuit (IC) including a frame suitable for receiving an integrated circuit (IC). The frame includes at least one leg coupled to the frame, the leg suitable for engaging a circuit board so as to enable the apparatus to be secured to the circuit board, thereby securing the integrated circuit (IC). At least one of the frame and leg include a conductive material so as to create at least one of a heat conducting path and an EMC ground path between the integrated circuit (IC) and the circuit board.
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: December 17, 2002
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6422893
    Abstract: The present invention is directed to an electrical connector including a first connector pin suitable for making contact on a side of a first flat conductor surrounded by an insulator and a second connector pin suitable for making contact on a side of a second flat conductor surrounded by an insulator. The first flat conductor and the second flat conductor are spaced to form an electrical differential pair.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: July 23, 2002
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6396699
    Abstract: An apparatus for mounting a heat sink to a chip package such as a BGA type chip package or the like is disclosed. In an exemplary embodiment, ground bumps are formed on the die substrate of the chip package and on the heat mating surface of the heat sink to be attached to the package. The ground bumps formed on the die protrude into the body of dimples formed in the body of the chip encapsulation package to make thermal/electrical ground contact with the ground bumps formed on the heat mating surface of the heat sink for electrically grounding the heat sink.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: May 28, 2002
    Assignee: LSI Logic Corporation
    Inventors: Barry Caldwell, Craig C. McCombs
  • Patent number: 6386901
    Abstract: A connector and pin structure for coupling with a higher density, finer conductor pitch ribbon cable or the like is disclosed. The connector has an array of pins disposed thereon where a beveled tip of the pin allows for the pin to penetrate the insulation sheath of a corresponding conductor, and the pins have a contacting structure that facilitates contact between the pin and the conductor. In one embodiment, such as where the conductor comprises a braided conductor, each pin has a bulge structure that allows for optimal contact between the pin and the conductor. In another embodiment, such as where the conductor comprises a braided conductor or a solid wire conductor, the pin is asymmetrical and has a notch structure that allows for optimal contact between the pin and the conductor.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: May 14, 2002
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6346676
    Abstract: An electrical cable suitable for transmission of data signals cable includes a dual layer ribbon cable with a first layer being offset from the other layer by an offset distance. The dual layer ribbon construction of the cable allows the cable to be compliant with a SCSI standard and to include a VHDCI compliant connector. The cable may have a first Z form where a spacer connects an insulator in the first layer with an insulator in the second layer, a second form in which an insulator of the first layer is attached to an insulator in the second layer, or a modified second form in which a spacer is attached between adjacent insulators in the same layer. The double layer ribbon cable construction allows the width of the cable to be reduced to accommodate a smaller pitched, larger pin number VHDCI compliant connector anywhere along the length of the cable.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: February 12, 2002
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6340795
    Abstract: The present invention is directed to an electrical cable. An electrical cable may include a first flat conductor surrounded by an insulator and a second flat conductor surrounded by an insulator, wherein the first flat conductor and the second flat conductor are spaced so as to form an electrical differential pair.
    Type: Grant
    Filed: July 17, 2000
    Date of Patent: January 22, 2002
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell