Patents by Inventor Barry Minor

Barry Minor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7515152
    Abstract: A sampling module that adjusts the sampling density of a static data set. Two or more rays are cast onto a surface from a single point of origin. The ray or rays intersect the surface at various locations. The distance between the intersection points of each pair of adjacent rays is calculated. This distance is the current sample density. The current sample density is compared to the desired sample density. If the current sample density is not equal to the desired sample density then the sample density of the next casting of rays is adjusted accordingly.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: April 7, 2009
    Assignee: International Business Machines Corporation
    Inventors: Gordon Clyde Fossum, Barry Minor, VanDung Dang To
  • Publication number: 20080114907
    Abstract: A system and product for a DMA controller with multi-dimensional line-walking functionality is presented. A processor includes an intelligent DMA controller, which loads a line description that corresponds to a shape or line. The intelligent DMA controller moves through a memory map and retrieves data based upon the line description that includes a major step and a minor step. In turn, the intelligent DMA controller retrieves data from the shared memory without assistance from its corresponding processor. In one embodiment, the intelligent DMA controller may analyze a line using the rate of change along its minor axes in conjunction with locations where the line intersects subspaces and store array spans of contiguous memory along the line's major axis.
    Type: Application
    Filed: January 18, 2008
    Publication date: May 15, 2008
    Inventors: Daniel Brokenshire, Gordon Fossum, Barry Minor
  • Publication number: 20080088618
    Abstract: A sampling module for adaptively sampling static data sets is provided. Two or more rays are cast onto a surface from a single point of origin. The ray or rays intersect the surface at various locations. The distance between the intersection points of each pair of adjacent rays is calculated. This distance is the current sample density. The current sample density is compared to the desired sample density. If the current sample density is not equal to the desired sample density then the sample density of the next casting of rays is adjusted accordingly.
    Type: Application
    Filed: November 30, 2007
    Publication date: April 17, 2008
    Inventors: GORDON FOSSUM, Barry Minor, VanDung Dang To
  • Patent number: 7345687
    Abstract: A sampling module is provided. Two or more rays are cast onto a surface from a single point of origin. The ray or rays intersect the surface at various locations. The distance between the intersection points of each pair of adjacent rays is calculated. This distance is the current sample density. The current sample density is compared to the desired sample density. If the current sample density is not equal to the desired sample density then the sample density of the next casting of rays is adjusted accordingly.
    Type: Grant
    Filed: August 16, 2005
    Date of Patent: March 18, 2008
    Assignee: International Business Machines Corporation
    Inventors: Gordon Clyde Fossum, Barry Minor, VanDung Dang To
  • Publication number: 20080036777
    Abstract: A system and method for cache optimized data formatting is presented. A processor generates images by calculating a plurality of image point values using height data, color data, and normal data. Normal data is computed for a particular image point using pixel data adjacent to the image point. The computed normalized data, along with corresponding height data and color data, are included in a limited space data stream and sent to a processor to generate an image. The normalized data may be computed using adjacent pixel data at any time prior to inserting the normalized data in the limited space data stream.
    Type: Application
    Filed: August 19, 2007
    Publication date: February 14, 2008
    Inventors: Gordon Fossum, Barry Minor
  • Publication number: 20070245097
    Abstract: The disclosed heterogeneous processor compresses information to more efficiently store the information in a system memory coupled to the processor. The heterogeneous processor includes a general purpose processor core coupled to one or more processor cores that exhibit an architecture different from the architecture of the general purpose processor core. In one embodiment, the processor dedicates a processor core other than the general purpose processor core to memory compression and decompression tasks. In another embodiment, system memory stores both compressed information and uncompressed information.
    Type: Application
    Filed: March 23, 2006
    Publication date: October 18, 2007
    Applicant: IBM Corporation
    Inventors: Michael Gschwind, Barry Minor
  • Publication number: 20070188487
    Abstract: The present invention renders a triangular mesh for employment in graphical displays. The triangular mesh comprises triangle-shaped graphics primitives. The triangle-shaped graphics primitives represent a subdivided triangular shape. Each triangle-shaped graphics primitive shares defined vertices with adjoining triangle-shaped graphics primitives. These shared vertices are transmitted and employed for the rendering of the triangle-shaped graphics primitives.
    Type: Application
    Filed: October 10, 2006
    Publication date: August 16, 2007
    Inventors: Daniel Brokenshire, Charles Johns, Barry Minor, Mark Nutter
  • Publication number: 20070174411
    Abstract: An apparatus and method for efficient communication of producer/consumer buffer status are provided. With the apparatus and method, devices in a data processing system notify each other of updates to head and tail pointers of a shared buffer region when the devices perform operations on the shared buffer region using signal notification channels of the devices. Thus, when a producer device that produces data to the shared buffer region writes data to the shared buffer region, an update to the head pointer is written to a signal notification channel of a consumer device. When a consumer device reads data from the shared buffer region, the consumer device writes a tail pointer update to a signal notification channel of the producer device. In addition, channels may operate in a blocking mode so that the corresponding device is kept in a low power state until an update is received over the channel.
    Type: Application
    Filed: January 26, 2006
    Publication date: July 26, 2007
    Inventors: Daniel Brokenshire, Charles Johns, Mark Nutter, Barry Minor
  • Publication number: 20070088866
    Abstract: A buffer, a method, and a computer program product for DMA transfers are provided that are designed to save memory space within a local memory of a processor. The buffer is a return buffer with a portion reserved for DMA lists. A DMA controller accomplishes DMA transfers by: reading address elements from a DMA list located in the DMA list portion; reading the corresponding data from system memory; and copying the corresponding data to the return buffer portion. This buffer saves space because when the buffer begins to fill up the corresponding return data can overwrite the data in the DMA list. Accordingly, the DMA list overlays on top of the return buffer, such that the return data can destruct the DMA list and the extra storage space for the DMA list is saved.
    Type: Application
    Filed: October 18, 2005
    Publication date: April 19, 2007
    Inventors: Michael Day, Charles Johns, Barry Minor
  • Publication number: 20070075994
    Abstract: A sampling module for adaptively sampling static data sets is provided. Two or more rays are cast onto a surface from a single point of origin. The ray or rays intersect the surface at various locations. The distance between the intersection points of each pair of adjacent rays is calculated. This distance is the current sample density. The current sample density is compared to the desired sample density. If the current sample density is not equal to the desired sample density then the sample density of the next casting of rays is adjusted accordingly.
    Type: Application
    Filed: August 16, 2005
    Publication date: April 5, 2007
    Inventors: Gordon Clyde Fossum, Barry Minor, VanDung Dang To
  • Publication number: 20070061101
    Abstract: An input device is disclosed, one embodiment of which provides position information to an information handling system (IHS). The position information includes both location information and spatial orientation information of the input device in real space. The input device includes a location sensor which determines the absolute location of the input device in x, y and z coordinates. The input device also includes a spatial orientation sensor that determines the spatial orientation of the input device in terms of yaw, pitch and roll. The input device further includes a processor that processes the location information and the spatial orientation information of the input device in real space to determine an image view from the perspective of the input device in virtual space. Movement of the input device in real space by a user causes a corresponding movement of an image view from the perspective of the input device in virtual space.
    Type: Application
    Filed: September 13, 2005
    Publication date: March 15, 2007
    Applicant: IBM Corporation
    Inventors: David Greene, Barry Minor, Blake Robertson, VanDung To
  • Publication number: 20070057968
    Abstract: A system and method for adaptive span computation when ray casting is presented. A processor uses start point fractional values during view screen segment computations that start a view screen segment's computations a particular distance away from a down point. This prevents an excessive sampling density during image generation without wasting processor resources. The processor identifies a start point fractional value for each view screen segment based upon each view screen segment's identifier, and computes a view screen segment start point for each view screen segment using the start point fractional value. View screen segment start points are “tiered” and are a particular distance away from the down point. This stops the view screen segments from converging to a point of severe over sampling while, at the same time, providing a pseudo-uniform sampling density.
    Type: Application
    Filed: September 15, 2005
    Publication date: March 15, 2007
    Inventors: Gordon Fossum, Barry Minor
  • Publication number: 20070035544
    Abstract: A system and method for generating an image that includes ray traced pixel data and rasterized pixel data is presented. A synergistic processing unit (SPU) uses a rendering algorithm to generate ray traced data for objects that require high-quality image rendering. The ray traced data is fragmented, whereby each fragment includes a ray traced pixel depth value and a ray traced pixel color value. A rasterizer compares ray traced pixel depth values to corresponding rasterized pixel depth values, and overwrites ray traced pixel data with rasterized pixel data when the corresponding rasterized fragment is “closer” to a viewing point, which results in composite data. A display subsystem uses the resultant composite data to generate an image on a user's display.
    Type: Application
    Filed: August 11, 2005
    Publication date: February 15, 2007
    Inventors: Gordon Fossum, Barry Minor, VanDung To
  • Publication number: 20060112368
    Abstract: A system and method for managing position independent code using a software framework is presented. A software framework provides the ability to cache multiple plug-in's which are loaded in a processor's local storage. A processor receives a command or data stream from another processor, which includes information corresponding to a particular plug-in. The processor uses the plug-in identifier to load the plug-in from shared memory into local memory before it is required in order to minimize latency. When the data stream requests the processor to use the plug-in, the processor retrieves a location offset corresponding to the plug-in and applies the plug-in to the data stream. A plug-in manager manages an entry point table that identifies memory locations corresponding to each plug-in and, therefore, plug-ins may be placed anywhere in a processor's local memory.
    Type: Application
    Filed: November 12, 2004
    Publication date: May 25, 2006
    Applicant: International Business Machines Corporation
    Inventors: Michael Gowen, Barry Minor, Mark Nutter, John Kevin O'Brien
  • Publication number: 20060095901
    Abstract: A system and method for partitioning processor resources based on memory usage is provided. A compiler determines the extent to which a process is memory-bound and accordingly divides the process into a number of threads. When a first thread encounters a prolonged instruction, the compiler inserts a conditional branch to a second thread. When the second thread encounters a prolonged instruction, a conditional branch to a third thread is executed. This continues until the last thread conditionally branches back to the first thread. An indirect segmented register file is used so that the “return to” and “branch to” logical registers within each thread are the same (e.g., R1 and R2) for each thread. These logical registers are mapped to hardware registers that store actual addresses. The indirect mapping is altered to bypass completed threads. When the last thread completes it may signal an external process.
    Type: Application
    Filed: February 3, 2005
    Publication date: May 4, 2006
    Inventors: Daniel Brokenshire, Barry Minor, Mark Nutter
  • Publication number: 20060080661
    Abstract: A System and method for hiding memory latency in a multi-thread environment is presented. Branch Indirect and Set Link (BISL) and/or Branch Indirect and Set Link if External Data (BISLED) instructions are placed in thread code during compilation at instances that correspond to a prolonged instruction. A prolonged instruction is an instruction that instigates latency in a computer system, such as a DMA instruction. When a first thread encounters a BISL or a BISLED instruction, the first thread passes control to a second thread while the first thread's prolonged instruction executes. In turn, the computer system masks the latency of the first thread's prolonged instruction. The system can be optimized based on the memory latency by creating more threads and further dividing a register pool amongst the threads to further hide memory latency in operations that are highly memory bound.
    Type: Application
    Filed: October 7, 2004
    Publication date: April 13, 2006
    Applicant: International Business Machines Corporation
    Inventors: Daniel Brokenshire, Harm Hofstee, Barry Minor, Mark Nutter
  • Publication number: 20060047864
    Abstract: A system and method for a DMA controller with multi-dimensional line-walking functionality is presented. A processor includes an intelligent DMA controller, which loads a line description that corresponds to a shape or line. The intelligent DMA controller moves through a memory map and retrieves data based upon the line description that includes a major step and a minor step. In turn, the intelligent DMA controller retrieves data from the shared memory without assistance from its corresponding processor. In one embodiment, the intelligent DMA controller may analyze a line using the rate of change along its minor axes in conjunction with locations where the line intersects subspaces and store array spans of contiguous memory along the line's major axis.
    Type: Application
    Filed: August 26, 2004
    Publication date: March 2, 2006
    Applicant: International Business Machines Corporation
    Inventors: Daniel Brokenshire, Gordon Fossum, Barry Minor
  • Publication number: 20050285852
    Abstract: A system and method for terrain rendering using a limited memory footprint is presented. A system and method to perform vertical ray terrain rendering by using a terrain data subset for image point value calculations. Terrain data is segmented into terrain data subsets whereby the terrain data subsets are processed in parallel. A bottom view ray intersects the terrain data to provide a memory footprint starting point. In addition, environmental visibility settings provide a memory footprint ending point. The memory footprint starting point, the memory footprint ending point, and vertical ray adjacent data points define a terrain data subset that corresponds to a particular vertical ray. The terrain data subset includes height and color information which are used for vertical ray coherence terrain rendering.
    Type: Application
    Filed: June 24, 2004
    Publication date: December 29, 2005
    Applicant: International Business Machines Corporation
    Inventors: Gordon Fossum, Barry Minor, Mark Nutter
  • Publication number: 20050285859
    Abstract: A system and method for cache optimized data formatting is presented. A processor generates images by calculating a plurality of image point values using height data, color data, and normal data. Normal data is computed for a particular image point using pixel data adjacent to the image point. The computed normalized data, along with corresponding height data and color data, are included in a limited space data stream and sent to a processor to generate an image. The normalized data may be computed using adjacent pixel data at any time prior to inserting the normalized data in the limited space data stream.
    Type: Application
    Filed: June 24, 2004
    Publication date: December 29, 2005
    Applicant: International Business Machines Corporation
    Inventors: Gordon Fossum, Barry Minor
  • Publication number: 20050285851
    Abstract: A system and method for terrain rendering using a limited memory footprint is presented. A vertical ray intersects a terrain data map at an angle which includes a minor step size. Weighting factors are assigned to triangular data sampling values and quadrilateral data sampling values based upon a vertical ray's minor step size. As a vertical ray's minor step size increases, a triangular data sampling's weighting factor increases and a quadrilateral data sampling's weighting factor decreases. Weighted triangular data sampling values and weighted quadrilateral data sampling values are combined to generate a vertical ray image point value.
    Type: Application
    Filed: June 24, 2004
    Publication date: December 29, 2005
    Applicant: International Business Machines Corporation
    Inventors: Gordon Fossum, Barry Minor