Patents by Inventor Barry S. Katz

Barry S. Katz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7143023
    Abstract: A method and system and computer program product for automatically creating computer simulations or analyses of signal transfers of a circuit or system design are disclosed. A description of a physical design of a circuit or system is provided. The physical design has physical components and at least one of the physical components may transfer a signal to at least one other physical component. The physical design description includes an identification of the physical components and information descriptive of physical inter-connectivity among the physical components. A signal transfer description is provided for at least one signal transfer. The signal transfer description includes a set of source nodes and a set of receiver nodes. The set of source nodes provide the signal to be transferred and the receiver nodes receive the signal transferred from the corresponding set of source nodes. Each node is described by information associated with physical components.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: November 28, 2006
    Assignee: Signal Integrity Software, Inc.
    Inventors: Barry S. Katz, Walter M. Katz
  • Patent number: 6711695
    Abstract: A processor system, comprising a system board on which a processor, a memory logic controller, and a clock source are installed and a memory module on which a memory device and PLL clock driver are installed. The system board is configured to accept one or more memory modules. The clock signal generated by the clock source is distributed to the various devices on the system board by a clock buffer tree via equal length etch runs. The same clock signal is also propagated via a different length etch to the memory device on the memory module. Clock skew generated by these different clock etch lengths is removed by routing a carefully tuned feedback loop of the clock driver from the memory module to the system board and back to the clock driver on the memory module. The PLL performs a clock signal voltage translation from PECL to TTL voltage.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: March 23, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Douglas J. Burns, Barry S. Katz
  • Publication number: 20030167161
    Abstract: A method and system and computer program product for automatically creating computer simulations or analyses of signal transfers of a circuit or system design are disclosed. A description of a physical design of a circuit or system is provided. The physical design has physical components and at least one of the physical components may transfer a signal to at least one other physical component. The physical design description includes an identification of the physical components and information descriptive of physical inter-connectivity among the physical components. A signal transfer description is provided for at least one signal transfer. The signal transfer description includes a set of source nodes and a set of receiver nodes. The set of source nodes provide the signal to be transferred and the receiver nodes receive the signal transferred from the corresponding set of source nodes. Each node is described by information associated with physical components.
    Type: Application
    Filed: March 1, 2002
    Publication date: September 4, 2003
    Inventors: Barry S. Katz, Walter M. Katz