Patents by Inventor Bart J. van Schravendijk
Bart J. van Schravendijk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11920239Abstract: Certain embodiments herein relate to an apparatus used for remote plasma processing. In various embodiments, the apparatus includes a reaction chamber that is conditioned by forming a low recombination material coating on interior chamber surfaces. The low recombination material helps minimize the degree of radical recombination that occurs when the reaction chamber is used to process substrates. During processing on substrates, the low recombination material may become covered by relatively higher recombination material (e.g., as a byproduct of the substrate processing), which results in a decrease in the amount of radicals available to process the substrate over time. The low recombination material coating may be reconditioned through exposure to an oxidizing plasma, which acts to reform the low recombination material coating. The reconditioning process may occur periodically as additional processing occurs on substrates.Type: GrantFiled: January 26, 2022Date of Patent: March 5, 2024Assignee: Lam Research CorporationInventors: Bhadri N. Varadarajan, Bo Gong, Rachel E. Batzer, Huatan Qiu, Bart J. Van Schravendijk, Geoffrey Hohn
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Publication number: 20240030031Abstract: Thin tin oxide films can be used in semiconductor device manufacturing. In one implementation, a method of processing a semiconductor substrate includes: providing a semiconductor substrate having a plurality of protruding features residing on an etch stop layer material, and an exposed tin oxide layer in contact with both the protruding features and the etch stop layer material, where the tin oxide layer covers both sidewalls and horizontal surfaces of the protruding features; and then completely removing the tin oxide layer from horizontal surfaces of the semiconductor substrate without completely removing the tin oxide layer residing at the sidewalls of the protruding features. Next, the protruding features can be removed without completely removing the tin oxide layer that resided at the sidewalls of the protruding features, thereby forming tin oxide spacers.Type: ApplicationFiled: October 6, 2023Publication date: January 25, 2024Inventors: David Charles Smith, Richard Wise, Arpan Mahorowala, Patrick A. Van Cleemput, Bart J. Van Schravendijk
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Publication number: 20230366094Abstract: An apparatus for depositing film stacks in-situ (i.e., without a vacuum break or air exposure) are described. In one example, a plasma-enhanced chemical vapor deposition apparatus configured to deposit a plurality of film layers on a substrate without exposing the substrate to a vacuum break between film deposition phases, is provided. The apparatus includes a process chamber, a plasma source and a controller configured to control the plasma source to generate reactant radicals using a particular reactant gas mixture during the particular deposition phase, and sustain the plasma during a transition from the particular reactant gas mixture supplied during the particular deposition phase to a different reactant gas mixture supplied during a different deposition phase.Type: ApplicationFiled: July 13, 2023Publication date: November 16, 2023Inventors: Jason Dirk Haverkamp, Pramod Subramonium, Joseph L. Womack, Dong Niu, Keith Fox, John B. Alexy, Patrick G. Breiling, Jennifer L. Petraglia, Mandyam A. Sriram, George Andrew Antonelli, Bart J. van Schravendijk
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Patent number: 11784047Abstract: Thin tin oxide films can be used in semiconductor device manufacturing. In one implementation, a method of processing a semiconductor substrate includes: providing a semiconductor substrate having a plurality of protruding features residing on an etch stop layer material, and an exposed tin oxide layer in contact with both the protruding features and the etch stop layer material, where the tin oxide layer covers both sidewalls and horizontal surfaces of the protruding features; and then completely removing the tin oxide layer from horizontal surfaces of the semiconductor substrate without completely removing the tin oxide layer residing at the sidewalls of the protruding features. Next, the protruding features can be removed without completely removing the tin oxide layer that resided at the sidewalls of the protruding features, thereby forming tin oxide spacers.Type: GrantFiled: April 22, 2021Date of Patent: October 10, 2023Assignee: Lam Research CorporationInventors: David Charles Smith, Richard Wise, Arpan Pravin Mahorowala, Patrick A. van Cleemput, Bart J. van Schravendijk
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Publication number: 20230317449Abstract: Various embodiments herein relate to methods and apparatus for depositing doped and undoped silicon-containing films having a high degree of purity. In one example, the method includes exposing the substrate to a first reactant and a second reactant; reacting the first and second reactants with one another to form a silicon-containing material and depositing a portion of the silicon-containing film on the substrate; before the silicon-containing film is complete, performing an impurity reduction operation including: (i) generating a plasma from a plasma generation gas comprising inert gas and hydrogen, where the plasma generation gas is substantially free of oxygen, and (ii) exposing the substrate to the plasma to thereby reduce a concentration of fluorine, carbon, hydrogen, and/or nitrogen in the silicon-containing film; and repeating these operations (or a subset thereof) until the silicon-containing film is deposited to a final thickness.Type: ApplicationFiled: July 27, 2021Publication date: October 5, 2023Inventors: Awnish Gupta, Bart J. Van Schravendijk, Jason Alexander Varnell, Joseph R. Abel, Jennifer Leigh Petraglia, Adrien LaVoie
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Publication number: 20230307290Abstract: Methods of forming air gaps in hole and trench structures are disclosed. The methods may be used to form buried voids, i.e., voids for which the top is below the top of the adjacent features. The methods include inhibition of the hole or trench structures and selective deposition at the top of the structure forming an air gap within the structures. In some embodiments, the methods are to reduce intra-level capacitance in semiconductor devices.Type: ApplicationFiled: June 28, 2021Publication date: September 28, 2023Inventors: Joseph R. ABEL, Bart J. VAN SCHRAVENDIJK, Ian John CURTIN, Douglas Walter AGNEW, Dustin Zachary AUSTIN, Awnish GUPTA
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Publication number: 20230245896Abstract: Methods and apparatuses for depositing dielectric films into features on semiconductor substrates are described herein. Methods involve depositing dielectric films by using controlled thermal chemical vapor deposition, with periodic passivation operations and densification to modulate film properties.Type: ApplicationFiled: July 21, 2021Publication date: August 3, 2023Inventors: Awnish Gupta, Bart J. Van Schravendijk, Frank Loren Pasquale, Adrien LaVoie, Jason Alexander Varnell, Praneeth Ramasagaram, Joseph R. Abel, Jennifer Leigh Petraglia, Dustin Zachary Austin
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Publication number: 20230175117Abstract: Methods of filling a gap with a dielectric material including using an inhibitor plasma during deposition. The inhibitor plasma increases a nucleation barrier of the deposited film. When the inhibitor plasma interacts with material in the feature, the material at the bottom of the feature receives less plasma treatment than material located closer to a top portion of the feature or in field. Deposition at the top of the feature is then selectively inhibited and deposition in lower portions of the feature proceeds with less inhibition or without being inhibited. As a result, bottom-up fill is enhanced, which can create a sloped profile that mitigates the seam effect and prevents void formation. In some embodiments, an underlying material at the top of the feature is protected using an integrated liner. In some embodiments, a hydrogen chemistry is used during gap fill to reduce seam formation.Type: ApplicationFiled: March 31, 2021Publication date: June 8, 2023Inventors: Dustin Zachary AUSTIN, Ian John CURTIN, Joseph R. ABEL, Bart J. VAN SCHRAVENDIJK, Seshasayee VARADARAJAN, Adrien LAVOIE, Jeremy David FIELDS, Pulkit AGARWAL, Shiva Sharan BHANDARI
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Patent number: 11637037Abstract: Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an Hz-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% Hz. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.Type: GrantFiled: March 20, 2020Date of Patent: April 25, 2023Assignee: Lam Research CorporationInventors: Patrick van Cleemput, Seshasayee Varadarajan, Bart J. van Schravendijk
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Publication number: 20230005740Abstract: Methods and apparatuses are provided herein for oxidizing an annular edge region of a substrate. A method may include providing the substrate to a substrate holder in a semiconductor processing chamber, the semiconductor processing chamber having a showerbead positioned above the substrate holder, and simultaneously flowing, while the substrate is supported by the substrate holder, (a) an oxidizing gas around a periphery of the substrate and (b) an inert gas that does not include oxygen through the showerhead and onto the substrate, thereby creating an annular gas region over an annular edge region of the substrate and an interior gas region over on an interior region of the substrate; the simultaneous flowing is not during a deposition of a material onto the substrate, and the annular gas region has an oxidization rate higher than the interior gas region.Type: ApplicationFiled: July 9, 2020Publication date: January 5, 2023Inventors: Gerald Joseph Brady, Kevin M. McLaughlin, Pratik Sankhe, Bart J. van Schravendijk, Shriram Vasant Bapat
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Publication number: 20220235464Abstract: A method for depositing carbon on a substrate in a processing chamber includes arranging the substrate on a substrate support in the processing chamber. The substrate includes a carbon film having a first thickness formed on at least one underlying layer of the substrate. The method further includes performing a first etching step to etch the substrate to form features on the substrate, remove portions of the carbon film, and decrease the first thickness of the carbon film, selectively depositing carbon onto remaining portions of the carbon film, and performing at least one second etching step to etch the substrate to complete the forming of the features on the substrate.Type: ApplicationFiled: June 22, 2020Publication date: July 28, 2022Inventors: Awnish GUPTA, Adrien LAVOIE, Bart J. VAN SCHRAVENDIJK, Samantha SiamHwa TAN
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Publication number: 20220208543Abstract: Methods and apparatuses for depositing thin films using long and short conversion times during alternating cycles of atomic layer deposition (ALD) are provided herein. Embodiments involve alternating conversion duration of an ALD cycle in one or more cycles of a multi-cycle ALD process. Some embodiments involve modulation of dose, purge, pressure, plasma power or plasma energy in two or more ALD cycles.Type: ApplicationFiled: July 3, 2019Publication date: June 30, 2022Inventors: Chan Myae Myae Soe, Chloe Baldasseroni, Shiva Sharan Bhandari, Pulkit Agarwal, Adrien LaVoie, Bart J. van Schravendijk
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Publication number: 20220181141Abstract: Disclosed are methods for the formation of silicon nitride (SiN) on only the horizontal surfaces of structures such as 3D NAND staircase. This allows for thicker landing pads for subsequently formed vias. In some embodiments, the methods involve deposition of a SiN layer over a staircase followed by a treatment to selectively densify the SiN layer on the horizontal surfaces with respect to the sidewall surfaces. A wet etch is then performed to remove SiN from the sidewall surfaces. The selective treatment results in significantly different wet etch rates (WERs) between the horizontal surfaces and the sidewalls.Type: ApplicationFiled: March 26, 2020Publication date: June 9, 2022Inventors: Bart J. van Schravendijk, Soumana Hamma, Kai-Lin Ou, Ming Li, Malay Milan Samantaray
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Publication number: 20220165563Abstract: A method for doping a substrate is provided. A silicon oxide diffusion barrier layer is formed on a surface of the substrate. At least one dopant layer is deposited over the silicon oxide diffusion barrier layer. A cap layer is deposited over the at least one dopant layer forming a stack of the substrate, the silicon oxide diffusion layer, the at least one dopant layer, and the cap layer. The stack is annealed. The cap layer, at least one dopant layer, and the silicon oxide diffusion barrier layer are removed.Type: ApplicationFiled: March 17, 2020Publication date: May 26, 2022Inventors: Purushottam KUMAR, Gengwei JIANG, Bart J. VAN SCHRAVENDIJK, Tengfei MIAO, Joseph R. ABEL, Adrien LAVOIE
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Publication number: 20220145459Abstract: Certain embodiments herein relate to an apparatus used for remote plasma processing. In various embodiments, the apparatus includes a reaction chamber that is conditioned by forming a low recombination material coating on interior chamber surfaces. The low recombination material helps minimize the degree of radical recombination that occurs when the reaction chamber is used to process substrates. During processing on substrates, the low recombination material may become covered by relatively higher recombination material (e.g., as a byproduct of the substrate processing), which results in a decrease in the amount of radicals available to process the substrate over time. The low recombination material coating may be reconditioned through exposure to an oxidizing plasma, which acts to reform the low recombination material coating. The reconditioning process may occur periodically as additional processing occurs on substrates.Type: ApplicationFiled: January 26, 2022Publication date: May 12, 2022Inventors: Bhadri N. VARADARAJAN, Bo GONG, Rachel E. BATZER, Huatan QIU, Bart J. VAN SCHRAVENDIJK, Geoffrey HOHN
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Publication number: 20220068636Abstract: Films that can be useful in large area gap fill applications, such as in the formation of advanced 3D NAND devices, involve processing a semiconductor substrate by depositing on a patterned semiconductor substrate a doped silicon oxide film, the film having a thickness of at least 5 gm, and annealing the doped silicon oxide film to a temperature above the film glass transition temperature. In some embodiments, reflow of the film may occur. The composition and processing conditions of the doped silicon oxide film may be tailored so that the film exhibits substantially zero as-deposited stress, substantially zero stress shift post-anneal, and substantially zero shrinkage post-anneal.Type: ApplicationFiled: January 15, 2020Publication date: March 3, 2022Applicant: Lam Research CorporationInventors: Reza Bayati, Bart J. van Schravendijk, Jonathan Church, Keith Fox
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Publication number: 20220059348Abstract: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.Type: ApplicationFiled: September 2, 2021Publication date: February 24, 2022Inventors: Hu Kang, Shankar Swaminathan, Jun Qian, Wanki Kim, Dennis M. Hausmann, Bart J. van Schravendijk, Adrien LaVoie
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Publication number: 20220051938Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.Type: ApplicationFiled: September 10, 2019Publication date: February 17, 2022Inventors: Hui-Jung Wu, Bart J. van Schravendijk, Mark Naoshi Kawaguchi, Gereng Gunawan, Jay E. Uglow, Nagraj Shankar, Gowri Channa Kamarthy, Kevin M. McLaughlin, Ananda K. Banerji, Jialing Yang, John Hoang, Aaron Lynn Routzahn, Nathan Musselwhite, Meihua Shen, Thorsten Bernd Lill, Hao Chi, Nicholas Dominic Altieri
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Publication number: 20220005694Abstract: Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, formation of spacers involves deposition of a tin oxide layer on a semiconductor substrate having multiple protruding features. The deposition is performed in a deposition apparatus having a controller with program instructions configured to cause sequential contacting of the semiconductor substrate with a tin-containing precursor and an oxygen-containing precursor such as to coat the semiconductor substrate having the protruding features with a tin oxide layer. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the semiconductor substrate.Type: ApplicationFiled: September 21, 2021Publication date: January 6, 2022Inventors: David Charles Smith, Richard Wise, Arpan Pravin Mahorowala, Patrick A. van Cleemput, Bart J. van Schravendijk
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Patent number: 11183383Abstract: Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and a plurality of protruding features comprising a second material (e.g., silicon or carbon). For example, 10-100 nm thick tin oxide layer can be deposited using atomic layer deposition. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the substrate. This is followed by etching the unprotected portions of the first material, without removal of the spacers. Next, underlying layer is etched, and spacers are removed. Tin-containing particles can be removed from processing chambers by converting them to volatile tin hydride.Type: GrantFiled: March 20, 2020Date of Patent: November 23, 2021Assignee: Lam Research CorporationInventors: David Charles Smith, Richard Wise, Arpan Mahorowala, Patrick van Cleemput, Bart J. van Schravendijk