Patents by Inventor Bart Masschelein

Bart Masschelein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9117310
    Abstract: A virtual camera system comprises a plurality of physical cameras and a hardware setup miming software to create virtual viewpoints for the virtual camera system. The position of the physical cameras is constrained, where the main constraint is the overlap between the physical cameras. The present invention provides a method for creating a virtual viewpoint of a plurality of images captured by the plurality of cameras, the images comprising current frames and previous frames.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: August 25, 2015
    Assignee: IMEC
    Inventors: Paul Coene, Johan De Geyter, Eddy De Greef, Bert Geelen, Bart Masschelein, Geert Vanmeerbeeck, Wilfried Verachtert
  • Publication number: 20130016097
    Abstract: A virtual camera system comprises a plurality of physical cameras and a hardware setup miming software to create virtual viewpoints for the virtual camera system. The position of the physical cameras is constrained, where the main constraint is the overlap between the physical cameras. The present invention provides a method for creating a virtual viewpoint of a plurality of images captured by the plurality of cameras, the images comprising current frames and previous frames.
    Type: Application
    Filed: April 1, 2011
    Publication date: January 17, 2013
    Applicant: IMEC
    Inventors: Paul Coene, Johan De Geyter, Eddy De Greef, Bert Geelen, Bart Masschelein, Geert Vanmeerbeeck, Wilfried Verachtert
  • Patent number: 7149362
    Abstract: Coding, transcoding and iterative filtering methods and apparatus are described wherein a 2D FIFO is used to implement CACLA processing, and wherein the processing methods are block-oriented. A block-by-block processed input image or input coded image, which is delayed in an arbitrary number of lines and columns, is provided such that the output image is produced in a block-by-block schedule at a reduced or minimal memory access and memory size cost. A 2D FIFO which is memory-efficient in image block coding and decoding applications is described. The 2D FIFO has an associated scheduling mechanism for enabling delay of a block-by-block coded input signal, such as an image, in an arbitrary number of lines and columns, such that the output image is produced in a block-by-block schedule.
    Type: Grant
    Filed: September 23, 2002
    Date of Patent: December 12, 2006
    Assignee: Interuniversitair Microelektronica Centrum (IMEC) vzw
    Inventors: Gauthier Lafruit, Bart Masschelein
  • Publication number: 20030142873
    Abstract: Coding, transcoding and iterative filtering methods and apparatus are described wherein a 2D FIFO is used to implement CACLA processing, and wherein the processing methods are block-oriented. A block-by-block processed input image or input coded image, which is delayed in an arbitrary number of lines and columns, is provided such that the output image is produced in a block-by-block schedule at a reduced or minimal memory access and memory size cost. A 2D FIFO which is memory-efficient in image block coding and decoding applications is described. The 2D FIFO has an associated scheduling mechanism for enabling delay of a block-by-block coded input signal, such as an image, in an arbitrary number of lines and columns, such that the output image is produced in a block-by-block schedule.
    Type: Application
    Filed: September 23, 2002
    Publication date: July 31, 2003
    Inventors: Gauthier Lafruit, Bart Masschelein