Abstract: An integrator (100) comprises an amplification and phase shifting element (170) with a feedback path (130) forming a loop and comprising a capacitive element (140). An input signal is summed into the loop, and the loop is arranged to oscillate at an oscillation frequency higher than the frequencies of interest in the input signal. The loop includes a filter (160) for attenuating the oscillation signal to ensure that the amplification and phase shifting element (170) can provide amplification for the input signal. The input signal is integrated and the integrated signal perturbs the zero crossings of the oscillation signal.

Abstract: A common mode control circuit (400) for generating a control signal indicative of a common mode signal in first and second signals of a differential signal pair comprises a first charge control means (300) for varying, dependent on polarity of the first and second signals with respect to a threshold, charge on a capacitive element (250, 260, 270). The first charge control means (300) is operable to, in response to the first and second signals both switching polarity simultaneously from opposite polarities, maintain a direction of flow of the charge. The first charge control means (300) can be operable to, in response to the first and second signals both switching polarity simultaneously from opposite polarities and the flow of charge being zero, maintain the flow at zero.

Abstract: An amplifier (1) includes an analogue-to-digital converter (ADC) (7) and a switched capacitor output stage (8). The ADC (7) converts an analogue signal into a digital signal containing a sequence of symbols. The switched capacitor output stage (8) charges and discharges a capacitor to produce charge pulses at an output (3). During discharge, switches selectively couple the capacitor to the output (3) in opposite directions to produce charge pulses of opposing polarity. The values of the symbols in the digital signal are used to decide the polarity of charge pulses. In this manner, amplification can be achieved without introducing a direct current (DC) component to the signal at the output (3).

Abstract: A method and arrangement of reducing inter-symbol interference occurring at the digital to analog conversion of a one bit digital signal is provided. During the generation of the one-bit digital signal in a sigma-delta converter the edge-density of the digital signal is measured, the result of the measurement is multiplied with the digital signal and the result of the multiplication is added to the input of the quantizer generating the digital signal. The invention also covers storage media comprising a one-bit digital signal generated in accordance with the invention.