Patents by Inventor Bashar Abdullah
Bashar Abdullah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11950032Abstract: Systems and methods implemented by a network element in a G.8032 ring include steps of operating an Operations, Administration, and Maintenance (OAM) session with an adjacent network element; and detecting an optical bypass in the G.8032 ring based on the OAM session. The steps can include flushing a forwarding database of the network element based on the optical bypass. The steps can include detecting prior to the optical bypass, that a neighboring node includes a ring block; and subsequent to the optical bypass, installing a new channel block. The optical bypass enables faster protection switching and the present disclosure incorporates an optical bypass in G.8032.Type: GrantFiled: April 19, 2022Date of Patent: April 2, 2024Assignee: Ciena CorporationInventors: Bashar Abdullah, Marc Holness, Priyanshu Lnu, Ritesh Ralhan, Rajneesh Mishra
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Publication number: 20230283934Abstract: Systems and methods implemented by a network element in a G.8032 ring include steps of operating an Operations, Administration, and Maintenance (OAM) session with an adjacent network element; and detecting an optical bypass in the G.8032 ring based on the OAM session. The steps can include flushing a forwarding database of the network element based on the optical bypass. The steps can include detecting prior to the optical bypass, that a neighboring node includes a ring block; and subsequent to the optical bypass, installing a new channel block. The optical bypass enables faster protection switching and the present disclosure incorporates an optical bypass in G.8032.Type: ApplicationFiled: April 19, 2022Publication date: September 7, 2023Inventors: Bashar Abdullah, Marc Holness, Priyanshu Lnu, Ritesh Ralhan, Rajneesh Mishra
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Publication number: 20230057463Abstract: Systems and methods include receiving Interior Gateway Protocol (IGP) messages from one or more network elements in a network; extracting timing information from any of the IGP messages where the timing information includes timing reference for a given network element for any of frequency, phase, and time; and storing the timing information. The steps can further include one of displaying a Graphical User Interface of the network including an operational timing trail for any of frequency, phase, and time; and displaying the timing information for the one or more network elements via a Command Line Interface (CLI).Type: ApplicationFiled: August 18, 2021Publication date: February 23, 2023Inventors: Gregory Vanderydt, Kevin Estabrooks, Bashar Abdullah
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Publication number: 20230022973Abstract: Systems and methods for detecting a rogue network device at a physical layer include monitoring physical layer characteristics of a wired link at both a first network device and a second network device; determining whether there are detectable variances in the physical layer characteristics; and detecting a rogue network device inserted on the link based on the detectable variances.Type: ApplicationFiled: October 3, 2022Publication date: January 26, 2023Inventors: Kevin Estabrooks, Greg Vanderydt, Bashar Abdullah
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Patent number: 11539452Abstract: A network element includes circuitry configured to receive information related to clock distribution from Precision Time Protocol (PTP) messages from an upstream network element, determine a delta between a network clock from the information and a Primary Reference Time Clock (PRTC), and transmit the delta in PTP messages to downstream network elements. The circuitry can be further configured to receive a configuration of a clock class of a clock at the network element, and transmit the clock class in the PTP messages with the delta. The clock class can be one of A, B, C, and D from G.8273.2 or G.8273.4.Type: GrantFiled: June 1, 2021Date of Patent: December 27, 2022Assignee: Ciena CorporationInventors: Bashar Abdullah, PengJoo Tan
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Publication number: 20220385389Abstract: A network element includes circuitry configured to receive information related to clock distribution from Precision Time Protocol (PTP) messages from an upstream network element, determine a delta between a network clock from the information and a Primary Reference Time Clock (PRTC), and transmit the delta in PTP messages to downstream network elements. The circuitry can be further configured to receive a configuration of a clock class of a clock at the network element, and transmit the clock class in the PTP messages with the delta. The clock class can be one of A, B, C, and D from G.8273.2 or G.8273.4.Type: ApplicationFiled: June 1, 2021Publication date: December 1, 2022Inventors: Bashar Abdullah, PengJoo Tan
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Patent number: 11470095Abstract: Systems and methods for detecting a rogue network device at a physical layer include obtaining physical layer characteristics of a link between a first network device and a second network device; analyzing the physical layer characteristics of the link; and detecting the rogue network device based on the analyzed physical layer characteristics, wherein the rogue network device was inserted in the link and causes detectable variances in the physical layer characteristics. The physical layer characteristics can include one of noise introduced in clock frequency and jitter.Type: GrantFiled: November 3, 2017Date of Patent: October 11, 2022Assignee: Ciena CorporationInventors: Kevin Estabrooks, Greg Vanderydt, Bashar Abdullah
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Patent number: 11300688Abstract: Systems and methods of storing phase history, and enhancing and restoring phase accuracy for a embedded Global Navigation Satellite System (GNSS) receiver include storing a phase history of the GNSS receiver output; determining an expected value of phase of the GNSS receiver output based on the phase history; and, responsive to a degradation of the GNSS receiver output, adjusting the GNSS receiver output utilizing the expected value of phase. The systems and method can further include, responsive to degradation being a loss of the GNSS receiver output, utilizing a holdover output from a physical frequency reference and with a phase adjusted based on the expected value of phase, and, responsive to the variation, utilizing the phase history to re-generate the GNSS receiver output for performance enhancement.Type: GrantFiled: February 26, 2020Date of Patent: April 12, 2022Assignee: Ciena CorporationInventors: Xiaojin Liu, Bashar Abdullah, Michel Desjardins
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Patent number: 11212068Abstract: A node can include a clock; and mapper circuitry configured to determine a timestamp from the clock, and transmit the timestamp to a second node in a Radio over Ethernet (RoE) frame with the timestamp in a control subtype and with an operational code (opcode) that designates the timestamp is in the frame. The node can also include a demapper circuit configured to receive a second timestamp from the second node in a second RoE frame, and provide the second timestamp to a Differential Clock Recovery (DCR) circuit for adjustment of the clock to a second clock at the second node.Type: GrantFiled: August 24, 2020Date of Patent: December 28, 2021Assignee: Ciena CorporationInventors: Xiaojin Liu, Vahid Naraghi, Bashar Abdullah
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Publication number: 20210266086Abstract: Systems and methods of storing phase history, and enhancing and restoring phase accuracy for a embedded Global Navigation Satellite System (GNSS) receiver include storing a phase history of the GNSS receiver output; determining an expected value of phase of the GNSS receiver output based on the phase history; and, responsive to a degradation of the GNSS receiver output, adjusting the GNSS receiver output utilizing the expected value of phase. The systems and method can further include, responsive to degradation being a loss of the GNSS receiver output, utilizing a holdover output from a physical frequency reference and with a phase adjusted based on the expected value of phase, and, responsive to the variation, utilizing the phase history to re-generate the GNSS receiver output for performance enhancement.Type: ApplicationFiled: February 26, 2020Publication date: August 26, 2021Inventors: Xiaojin Liu, Bashar Abdullah, Michel Desjardins
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Patent number: 10594395Abstract: Systems and methods of compensating for the delay asymmetry of coherent optical modems in a packet optical network include measuring fill levels of one or more queues each including an elastic First-In-First-Out (FIFO) circuit used in a transport mapping scheme, wherein the transport mapping scheme is one or more of client mapping to Optical Transport Unit (OTU) and OTU mapping to Flexible OTN (FlexO); and performing adjustments in a clock based in part on the measured fill levels, wherein the adjustments are configured to reduce a Time Error (TE) in the packet network based on delay asymmetry between two nodes.Type: GrantFiled: July 23, 2018Date of Patent: March 17, 2020Assignee: Ciena CorporationInventors: Bashar Abdullah, Daniel Perras, Sebastien Gareau, Xiaojin Liu
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Publication number: 20200028585Abstract: Systems and methods of compensating for the delay asymmetry of coherent optical modems in a packet optical network include measuring fill levels of one or more queues each including an elastic First-In-First-Out (FIFO) circuit used in a transport mapping scheme, wherein the transport mapping scheme is one or more of client mapping to Optical Transport Unit (OTU) and OTU mapping to Flexible OTN (FlexO); and performing adjustments in a clock based in part on the measured fill levels, wherein the adjustments are configured to reduce a Time Error (TE) in the packet network based on delay asymmetry between two nodes.Type: ApplicationFiled: July 23, 2018Publication date: January 23, 2020Inventors: Bashar Abdullah, Daniel Perras, Sebastien Gareau, Xiaojin Liu
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Patent number: 10355799Abstract: Clock synchronization in a network includes receiving, by a slave network device from a master network device via at least a intervening network device, a timing packet comprising a transmission timestamp and a residence time. The transmission timestamp is based on a master clock of the master network device. The residence time corresponds to a delay of the timing packet traversing the intervening device. Clock synchronization in a network further includes generating, by the slave network device in response to receiving the timing packet, a receiving timestamp based on a slave clock of the slave network device, and generating, based at least on the transmission timestamp, the residence time, and the receiving timestamp, a time difference between the master clock and the slave clock. Clock synchronization in a network further includes synchronizing, based at least on the time difference, the master clock and the slave clock.Type: GrantFiled: September 28, 2017Date of Patent: July 16, 2019Assignee: Ciena CorporationInventors: Bashar Abdullah, Kevin Estabrooks, Gregory Vanderydt, Stephen Donald Crooks
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Publication number: 20190141056Abstract: Systems and methods for detecting a rogue network device at a physical layer include obtaining physical layer characteristics of a link between a first network device and a second network device; analyzing the physical layer characteristics of the link; and detecting the rogue network device based on the analyzed physical layer characteristics, wherein the rogue network device was inserted in the link and causes detectable variances in the physical layer characteristics. The physical layer characteristics can include one of noise introduced in clock frequency and jitter.Type: ApplicationFiled: November 3, 2017Publication date: May 9, 2019Inventors: Kevin ESTABROOKS, Greg VANDERYDT, Bashar ABDULLAH
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Publication number: 20190097744Abstract: Clock synchronization in a network includes receiving, by a slave network device from a master network device via at least a intervening network device, a timing packet comprising a transmission timestamp and a residence time. The transmission timestamp is based on a master clock of the master network device. The residence time corresponds to a delay of the timing packet traversing the intervening device. Clock synchronization in a network further includes generating, by the slave network device in response to receiving the timing packet, a receiving timestamp based on a slave clock of the slave network device, and generating, based at least on the transmission timestamp, the residence time, and the receiving timestamp, a time difference between the master clock and the slave clock. Clock synchronization in a network further includes synchronizing, based at least on the time difference, the master clock and the slave clock.Type: ApplicationFiled: September 28, 2017Publication date: March 28, 2019Inventors: Bashar Abdullah, Kevin Estabrooks, Gregory Vanderydt, Stephen Donald Crooks
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Patent number: 9843439Abstract: A system for managing holdover. The system may include a local oscillator device. The system may include a phase locked loop (PLL) device coupled to the local oscillator device and a reference clock source. The PLL device may obtain a reference clock signal from the reference clock source to produce an extracted clock signal. The system may include a drift monitoring device coupled to the local oscillator device and the PLL device. The drift monitoring device may determine an amount of oscillator drift within the local oscillator device using the extracted clock signal and an oscillator signal from the local oscillator device. The system may include a drift compensation device coupled to the drift monitoring device and the PLL device. The drift compensation device may transmit a drift compensation signal to the PLL device based on the amount of oscillator drift.Type: GrantFiled: January 27, 2016Date of Patent: December 12, 2017Assignee: Ciena CorporationInventors: Daniel Rivaud, Kevin Estabrooks, Bashar Abdullah
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Publication number: 20170214516Abstract: A system for managing holdover. The system may include a local oscillator device. The system may include a phase locked loop (PLL) device coupled to the local oscillator device and a reference clock source. The PLL device may obtain a reference clock signal from the reference clock source to produce an extracted clock signal. The system may include a drift monitoring device coupled to the local oscillator device and the PLL device. The drift monitoring device may determine an amount of oscillator drift within the local oscillator device using the extracted clock signal and an oscillator signal from the local oscillator device. The system may include a drift compensation device coupled to the drift monitoring device and the PLL device. The drift compensation device may transmit a drift compensation signal to the PLL device based on the amount of oscillator drift.Type: ApplicationFiled: January 27, 2016Publication date: July 27, 2017Applicant: Ciena CorporationInventors: Daniel Rivaud, Kevin Estabrooks, Bashar Abdullah
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Patent number: 9401817Abstract: A method of routing traffic through a packet network having a mesh physical topology. At least two types of network primitive are defined, each type of network primitive providing a respective model of traffic forwarding through at least two neighbor nodes of the network. A network model encompassing at least a portion of the network is constructed using a set of two or more interconnected network primitives. The network model has nodes and links corresponding to respective nodes and lines of the network. Respective forwarding information is computed for each node of the network model. For each node of the network model, the respective computed forwarding information is installed in a forwarding database of the corresponding node of the network, such that traffic is forwarded by each node of the network in accordance with the respective computed forwarding information.Type: GrantFiled: May 22, 2015Date of Patent: July 26, 2016Assignee: Ciena CorporationInventors: Marc Holness, Bashar Abdullah
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Publication number: 20150280938Abstract: A method of routing traffic through a packet network having a mesh physical topology. At least two types of network primitive are defined, each type of network primitive providing a respective model of traffic forwarding through at least two neighbour nodes of the network. A network model encompassing at least a portion of the network is constructed using a set of two or more interconnected network primitives. The network model has nodes and links corresponding to respective nodes and lines of the network. Respective forwarding information is computed for each node of the network model. For each node of the network model, the respective computed forwarding information is installed in a forwarding database of the corresponding node of the network, such that traffic is forwarded by each node of the network in accordance with the respective computed forwarding information.Type: ApplicationFiled: May 22, 2015Publication date: October 1, 2015Applicant: CIENA CORPORATIONInventors: Marc HOLNESS, Bashar ABDULLAH
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Patent number: 9042395Abstract: A method of routing traffic through a packet network having a mesh physical topography. At least two types of network primitive are defined, each type of network primitive providing a respective model of traffic forwarding through at least two neighbor nodes of the network. A network model encompassing at least a portion of the network is constructed using a set of two or more interconnected network primitives. The network model has nodes and links corresponding to respective nodes and lines of the network. Respective forwarding information is computed for each node of the network model. For each node of the network model, the respective computed forwarding information is installed in a forwarding database of the corresponding node of the network, such that traffic is forwarded by each node of the network in accordance with the respective computed forwarding information.Type: GrantFiled: May 1, 2009Date of Patent: May 26, 2015Assignee: CIENA CORPORATIONInventors: Marc Holness, Bashar Abdullah