Patents by Inventor Ben Choy

Ben Choy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • CAPACITIVE PARAMETRIC ZERO CROSSING DETECTOR DEVICE, CIRCUIT AND METHOD
    Publication number: 20150070034
    Abstract: A capacitive parametric zero crossing detection circuit has a nonlinear voltage controlled capacitive device coupled to an input voltage to convert a zero crossing current pulse into zero crossing voltage signal.
    Type: Application
    Filed: September 9, 2013
    Publication date: March 12, 2015
    Inventors: Ching Chu, Ben Choy, Andy Tu
  • Multi-level high voltage pulser integrated circuit using low voltage MOSFETs
    Patent number: 8542037
    Abstract: A multi-level high-voltage pulse generator integrated circuit has a digital logic-level control interface circuit. A pair of complementary MOSFETs is controlled by the digital control interface circuit. A pair of supply voltage rails is provided, wherein one of the pair of supply voltage rails is connected to each of the pair of complementary MOSFETs. A pair of Zener diodes is provided, wherein one of the pair of Zener diodes is connected to each of the pair of complementary MOSFETs. A pair of resistors is provided, wherein one of the pair of resistors is connected in parallel with each of the pair of Zener diodes. A pair of complementary voltage blocking-MOSFETs having predetermined gate bias voltages is provided, wherein each of the pair complementary voltage blocking-MOSFETs is attached to a corresponding one pair of complementary MOSFETs.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: September 24, 2013
    Assignee: Supertex, Inc.
    Inventors: Ben Choy, Ching Chu
  • MULTI-LEVEL HIGH VOLTAGE PULSER INTEGRATED CIRCUIT USING LOW VOLTAGE MOSFETS
    Publication number: 20130187697
    Abstract: A multi-level high-voltage pulse generator integrated circuit has a digital logic-level control interface circuit. A pair of complementary MOSFETs is controlled by the digital control interface circuit. A pair of supply voltage rails is provided, wherein one of the pair of supply voltage rails is connected to each of the pair of complementary MOSFETs. A pair of Zener diodes is provided, wherein one of the pair of Zener diodes is connected to each of the pair of complementary MOSFETs. A pair of resistors is provided, wherein one of the pair of resistors is connected in parallel with each of the pair of Zener diodes. A pair of complementary voltage blocking-MOSFETs having predetermined gate bias voltages is provided, wherein each of the pair complementary voltage blocking-MOSFETs is attached to a corresponding one pair of complementary MOSFETs.
    Type: Application
    Filed: January 23, 2012
    Publication date: July 25, 2013
    Inventors: Ben Choy, Ching Chu