Patents by Inventor Benhard Laubli

Benhard Laubli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Locking a cache line for write operations on a bus
    Patent number: 10331568
    Abstract: Provided are a computer program product, system, and method for locking a cache line for a burst write operations on a bus. A cache line is allocated in a cache for a target address. A lock is set for the cache line, wherein setting the lock prevents the data in the cache line from being cast out. Data is written to the cache line. All the data in the cache line is flushed to the target address over a bus in response to completing writing to the cache line.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: June 25, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen L. Blinick, Charles S. Cardinell, Roger G. Hathorn, Benhard Laubli, Miguel A. Montoya, Timothy J. Van Patten
  • LOCKING A CACHE LINE FOR WRITE OPERATIONS ON A BUS
    Publication number: 20180276133
    Abstract: Provided are a computer program product, system, and method for locking a cache line for a burst write operations on a bus. A cache line is allocated in a cache for a target address. A lock is set for the cache line, wherein setting the lock prevents the data in the cache line from being cast out. Data is written to the cache line. All the data in the cache line is flushed to the target address over a bus in response to completing writing to the cache line.
    Type: Application
    Filed: May 25, 2018
    Publication date: September 27, 2018
    Applicants: International Business Machines Corporation, International Business Machines Corporation
    Inventors: Stephen L. Blinick, Charles S. Cardinell, Roger G. Hathorn, Benhard Laubli, Miguel A. Montoya, Timothy J. Van Patten
  • LOCKING A CACHE LINE FOR WRITE OPERATIONS ON A BUS
    Publication number: 20160335189
    Abstract: Provided are a computer program product, system, and method for locking a cache line for a burst write operations on a bus. A cache line is allocated in a cache for a target address. A lock is set for the cache line, wherein setting the lock prevents the data in the cache line from being cast out. Data is written to the cache line. All the data in the cache line is flushed to the target address over a bus in response to completing writing to the cache line.
    Type: Application
    Filed: July 25, 2016
    Publication date: November 17, 2016
    Inventors: Stephen L. Blinick, Charles S. Cardinell, Roger G. Hathorn, Benhard Laubli, Miguel A. Montoya, Timothy J. Van Patten
  • LOCKING A CACHE LINE FOR WRITE OPERATIONS ON A BUS
    Publication number: 20150248351
    Abstract: Provided are a computer program product, system, and method for locking a cache line for a burst write operations on a bus. A cache line is allocated in a cache for a target address. A lock is set for the cache line, wherein setting the lock prevents the data in the cache line from being cast out. Data is written to the cache line. All the data in the cache line is flushed to the target address over a bus in response to completing writing to the cache line.
    Type: Application
    Filed: May 14, 2015
    Publication date: September 3, 2015
    Inventors: Stephen L. Blinick, Charles S. Cardinell, Roger G. Hathorn, Benhard Laubli, Miguel A. Montoya, Timothy J. Van Patten