Patents by Inventor Benjamin Allen Vandersloot

Benjamin Allen Vandersloot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Data processing apparatus with memory rename table for mapping memory addresses to registers
    Patent number: 9471480
    Abstract: A data processing apparatus has a memory rename table for storing memory rename entries each identifying a mapping between a memory address of a location in memory and a mapped register of a plurality of registers. The mapped register is identified by a register number. In response to a store instruction, the store target memory address of the store instruction is mapped to a store destination register and so the data value is stored to the store destination register instead of memory. A memory rename entry is provided in the table to identify the mapping between the store target memory address and store destination target register. In response to a load instruction, if there is a hit in the memory rename table for the load target memory address then the loaded value can be read from the mapped register instead of memory.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: October 18, 2016
    Assignee: The Regents of the University of Michigan
    Inventors: Joseph Michael Pusdesris, Yiping Kang, Andrea Pellegrini, Benjamin Allen Vandersloot, Trevor Nigel Mudge
  • DATA PROCESSING APPARATUS WITH MEMORY RENAME TABLE FOR MAPPING MEMORY ADDRESSES TO REGISTERS
    Publication number: 20150154106
    Abstract: A data processing apparatus has a memory rename table for storing memory rename entries each identifying a mapping between a memory address of a location in memory and a mapped register of a plurality of registers. The mapped register is identified by a register number. In response to a store instruction, the store target memory address of the store instruction is mapped to a store destination register and so the data value is stored to the store destination register instead of memory. A memory rename entry is provided in the table to identify the mapping between the store target memory address and store destination target register. In response to a load instruction, if there is a hit in the memory rename table for the load target memory address then the loaded value can be read from the mapped register instead of memory.
    Type: Application
    Filed: February 21, 2014
    Publication date: June 4, 2015
    Applicant: The Regents of the University of Michigan
    Inventors: Joseph Michael PUSDESRIS, Yiping Kang, Andrea Pellegrini, Benjamin Allen Vandersloot, Trevor Nigel Mudge