Patents by Inventor Benjamin C. Eckermann

Benjamin C. Eckermann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9900390
    Abstract: A system and methods controlling wake events in a data processing system is described. A broadcast wake-up signal staggering order is determined in response to a first wake event. A staggered broadcast wake-up signal is distributed to a plurality of processing elements based on the broadcast wake-up signal staggering order. The broadcast wake-up signal staggering order is changed in response to a second wake event. And a changed staggered broadcast wake-up signal is distributed to a plurality of processing elements based on the changed broadcast wake-up signal staggering order.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: February 20, 2018
    Assignee: NXP USA, INC.
    Inventors: David C. Holloway, Benjamin C. Eckermann, Joseph P. Gergen, Craig C. Hunter, Bryan D. Marietta, David W. Todd
  • Publication number: 20160344820
    Abstract: A system and methods controlling wake events in a data processing system is described. A broadcast wake-up signal staggering order is determined in response to a first wake event. A staggered broadcast wake-up signal is distributed to a plurality of processing elements based on the broadcast wake-up signal staggering order. The broadcast wake-up signal staggering order is changed in response to a second wake event. And a changed staggered broadcast wake-up signal is distributed to a plurality of processing elements based on the changed broadcast wake-up signal staggering order.
    Type: Application
    Filed: May 21, 2015
    Publication date: November 24, 2016
    Inventors: David C. HOLLOWAY, Benjamin C. ECKERMANN, Joseph P. GERGEN, Craig C. HUNTER, Bryan D. MARIETTA, David W. TODD
  • Patent number: 8397006
    Abstract: A processing system includes a shared resource, an arbitration module, and a requesting device for issuing requests to the arbitration module to access the shared resource to perform transactions on the shared resource. The arbitration module grants access to the requesting device for a fixed time duration. The fixed time duration comprises one of a plurality of time durations including a first and a second time duration; the second longer than the first. The requesting device prioritizes performance of the transactions on the shared resource based upon the fixed time duration and types of transactions to be performed. Transaction type comprises one of a plurality of types including a first type that requires a time duration that can be performed within the first time duration and a second type that requires a time duration that exceeds the first time duration but can be performed within the second time duration.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: March 12, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Benjamin C. Eckermann
  • Patent number: 8286011
    Abstract: A method and apparatus for storing and classifying packets transmitted over a network to a processor in a low power mode. The processor receives and classifies the packets as interesting or not interesting. Uninteresting packets are discarded while interesting packets are stored in memory. For the first interesting packet received, a receive timer is activated and for every interesting packet received a counter is incremented. A transmit timer is activated when the processor enters the low power mode. When either the receive timer expires, the transmit timer expires or the counter reaches a threshold value then a wake-up interrupt is asserted.
    Type: Grant
    Filed: February 28, 2010
    Date of Patent: October 9, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mohit Satsangi, E. S. Kalyana Chakravarthy, Benjamin C. Eckermann, Gregory B. Shippen
  • Publication number: 20110213992
    Abstract: A method and apparatus for storing and classifying packets transmitted over a network to a processor in a low power mode. The processor receives and classifies the packets as interesting or not interesting. Uninteresting packets are discarded while interesting packets are stored in memory. For the first interesting packet received, a receive timer is activated and for every interesting packet received a counter is incremented. A transmit timer is activated when the processor enters the low power mode. When either the receive timer expires, the transmit timer expires or the counter reaches a threshold value then a wake-up interrupt is asserted.
    Type: Application
    Filed: February 28, 2010
    Publication date: September 1, 2011
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Mohit SATSANGI, E.S. Kalyana Chakravarthy, Benjamin C. Eckermann, Gregory B. Shippen
  • Publication number: 20110185095
    Abstract: A processing system includes a shared resource, an arbitration module, and a requesting device for issuing requests to the arbitration module to access the shared resource to perform transactions on the shared resource. The arbitration module grants access to the requesting device for a fixed time duration. The fixed time duration comprises one of a plurality of time durations including a first and a second time duration; the second longer than the first. The requesting device prioritizes performance of the transactions on the shared resource based upon the fixed time duration and types of transactions to be performed. Transaction type comprises one of a plurality of types including a first type that requires a time duration that can be performed within the first time duration and a second type that requires a time duration that exceeds the first time duration but can be performed within the second time duration.
    Type: Application
    Filed: January 28, 2010
    Publication date: July 28, 2011
    Inventor: Benjamin C. Eckermann
  • Patent number: 7865897
    Abstract: A method includes receiving, at an interconnect, a first transaction request from a first requesting module. The first transaction request includes a request to utilize at least one system resource accessible via the interconnect. The method further includes determining potential interferences at the interconnect expected to occur as a result of a utilization of the at least one system resource by the first requesting module and initiating processing of the first transaction request at the interconnect. The method additionally includes authorizing processing of a second transaction request from a second requesting module during the processing of the first transaction request based on the determined potential interferences.
    Type: Grant
    Filed: February 3, 2006
    Date of Patent: January 4, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Benjamin C. Eckermann, Brett W. Murdock, William C. Moyer