Abstract: Methods and devices for transmitting a continuous bit stream in a digital network non-synchronous with the bit stream are disclosed. In one aspect, the method includes digitizing a continuous bit stream implemented by a transmitting apparatus and restoring the continuous bit stream implemented by a receiving apparatus. A processor of the transmitting apparatus digitizes the initial continuous bit stream into a binary data sequence to be transmitted at a nominal frequency corresponding to a set clock period, the binary data to be transmitted being encapsulated in at least one transport frame sent to the receiving apparatus. The digitization includes estimating a mean emission clock period value of the data sequence, and inserting, in a predetermined field of the transport frame, information making it possible to restore, in the receiving apparatus, the mean emission clock period value of the data sequence.

Abstract: Methods and devices for transmitting a continuous bit stream in a digital network non-synchronous with the bit stream are disclosed. In one aspect, the method includes digitizing a continuous bit stream implemented by a transmitting apparatus and restoring the continuous bit stream implemented by a receiving apparatus. A processor of the transmitting apparatus digitizes the initial continuous bit stream into a binary data sequence to be transmitted at a nominal frequency corresponding to a set clock period, the binary data to be transmitted being encapsulated in at least one transport frame sent to the receiving apparatus. The digitization includes estimating a mean emission clock period value of the data sequence, and inserting, in a predetermined field of the transport frame, information making it possible to restore, in the receiving apparatus, the mean emission clock period value of the data sequence.

Abstract: A bidirectional data exchange circuit (10) includes a buffer (16) having paired terminals (A1 . . . A8, B1 . . . B8), a transfer direction input (20), an input (42) for controlling the transfer direction, and a logic gate (50). In the logic gate (50), the output is connected to the transfer direction input (20), an input is connected to the input (42) for controlling the transfer direction, this input being further connected to a first reference potential (Vcc) through a resistor (52), and the other input is connected to a terminal (A1) of the buffer (16) and to the first reference potential (Vcc) through a resistor (54; 154), and the terminal (B1) of the buffer (16), matched with the terminal (A1) of the buffer to which is connected the other input of the logic gate (50) being connected to a second reference potential through a resistor (56).

Abstract: A bidirectional data exchange circuit (10) includes a buffer (16) having paired terminals (A1 . . . A8, B1 . . . B8), a transfer direction input (20), an input (42) for controlling the transfer direction, and a logic gate (50). In the logic gate (50), the output is connected to the transfer direction input (20), an input is connected to the input (42) for controlling the transfer direction, this input being further connected to a first reference potential (Vcc) through a resistor (52), and the other input is connected to a terminal (A1) of the buffer (16) and to the first reference potential (Vcc) through a resistor (54; 154), and the terminal (B1) of the buffer (16), matched with the terminal (A1) of the buffer to which is connected the other input of the logic gate (50) being connected to a second reference potential through a resistor (56).