Abstract: An apparatus is provided. The apparatus comprises a reference circuit and a startup circuit. The reference circuit is adapted to provide a startup current, while the startup circuit receives the startup current and outputs an output voltage. The startup circuit includes a current mirror, a first NMOS transistor, a second NMOS transistor, diodes, and a third NMOS transistor, and a control circuit. The first and second NMOS transistors are coupled to the current mirror at their sources and are coupled to one another and to the reference circuit at their gates. The diodes are coupled between the gate of the second NMOS transistor and the source of the second NMOS transistor, and the third NMOS transistor is coupled to the source of the second NMOS transistor at its gate (which also provides the output voltage at its source). The control circuit is then coupled to the drains of the first and second NMOS transistors.

Abstract: An apparatus is provided. The apparatus comprises a reference circuit and a startup circuit. The reference circuit is adapted to provide a startup current, while the startup circuit receives the startup current and outputs an output voltage. The startup circuit includes a current mirror, a first NMOS transistor, a second NMOS transistor, diodes, and a third NMOS transistor, and a control circuit. The first and second NMOS transistors are coupled to the current mirror at their sources and are coupled to one another and to the reference circuit at their gates. The diodes are coupled between the gate of the second NMOS transistor and the source of the second NMOS transistor, and the third NMOS transistor is coupled to the source of the second NMOS transistor at its gate (which also provides the output voltage at its source). The control circuit is then coupled to the drains of the first and second NMOS transistors.

Abstract: Systems, methods and circuits for regulator minimum load control. In one particular case, a system is provided that includes a load control circuit and a switched load. The load control circuit includes a reference current, and a sense current representative of a load current. In addition, the load control circuit includes a comparator circuit that drives a control signal in response to a comparison between the reference current and the sense current. The switched load is electrically coupled to a load voltage signal to provide loading to the load voltage signal. The switched load is operable to switch between a first loading factor and a second loading factor in response to the control signal.

Abstract: A wake-up circuit for a ECU on a ECN utilizes two complementary switching transistors which will turn ON when there is a differential voltage between CANH and CANL which will turn ON the transistors to pass a current which will be mirrored over to create a voltage which will switch a comparator or a Schmitt trigger. The two signals are then ORed together to generate a digital wake-up signal that can be utilized by other on-chip circuitry.

Abstract: A wake-up circuit for a ECU on a CAN bus utilizes two complementary switching transistors which will turn ON when there is a differential voltage between CANH and CANL which will turn ON the transistors to pass a current which will be mirrored over to create a voltage which will switch a comparator or a Schmitt trigger. The two signals are then ORed together to generate a digital wake-up signal that can be utilized by other on-chip circuitry.