Patents by Inventor Benjamin P. Law

Benjamin P. Law has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7358452
    Abstract: A switch comprises a first wafer having a thin-film structure defined thereon, a second wafer having a plurality of features defined therein, and a seal between the first wafer and the second wafer forming a two-wafer structure having a liquid metal microswitch defined therebetween.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: April 15, 2008
    Assignee: Agilent Technlolgies, Inc.
    Inventors: Timothy Beerling, Steven A. Rosenau, Benjamin P. Law, Ronald Shane Fazzio, Marco Aimi
  • Patent number: 7111382
    Abstract: Methods are provided for forming current perpendicular to the plane thin film read heads. In one embodiment, the method comprises the steps of forming a lower sensor lead, forming a lower sensor lead cladding of a low sputter yield material on the lower sensor lead, forming a sensor element on the lower sensor lead cladding, and forming an upper sensor lead coupled to the sensor element. The low sputter yield material helps to reduce redeposition of the lower sensor lead material onto side walls of the sensor element as the sensor element is being formed.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: September 26, 2006
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Kenneth E. Knapp, Ronald A. Barr, Lien-Chang Wang, Benjamin P. Law, James Spallas
  • Patent number: 6833979
    Abstract: The present invention provides an improved current perpendicular to the plane thin film read head device and method of fabrication. With the present invention, the lower lead is formed to inhibit accumulation of redeposited lead material on CPP sensor element side walls during CPP sensor formation. In the preferred embodiment, the upper portion of the lower lead, which normally is etched during sensor element formation, is formed of a low sputter yield material to reduce redeposition flux to the sensor side walls. It is also preferred to form the upper portion of a material that also has a low value for the ratio of its sputter yield at the lead milling angle-to-its sputter yield at the side wall milling angle to inhibit redeposition accumulation on the side wall. It is preferred to clad conventional lead material with a low sputter yield ratio, low resistivity material, to inhibit side wall redeposition accumulation while also providing a low resistance lower lead.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: December 21, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Kenneth E. Knapp, Ronald A. Barr, Lien-Chang Wang, Benjamin P. Law, James Spallas
  • Patent number: 6735850
    Abstract: The present invention provides an improved bias magnet-to-magnetoresistive element interface and method of fabrication. In a preferred embodiment, the wall/walls of an MR element opposing a bias layer are formed by over etching to provide vertical side walls without taper. In the preferred embodiment, a protective element is formed over the MR element to protect it during etch processes. In some embodiments, a filler layer is deposited prior to bias layer formation. In CIP embodiments, any portion of the filler layer forming on vertical side walls of the MR element is etched to provide an exposed side wall surface for contiguous bias layer formation. In CPP embodiments, the filler layer forms on a vertical back wall and electrically insulates the MR element from the bias layer.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: May 18, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Matthew Gibbons, Kenneth E. Knapp, Ronald A. Barr, Benjamin P. Law, James Spallas, Ming Zhao
  • Patent number: 6681496
    Abstract: A method is disclosed by which precision alignment of optical fiber to wave-guide or other optical elements can be carried out with an adjustable microstructure in active alignment mode fiber attachment. A microstructure containing three elongated U-grooves can be combined effectively to produce a movable and adjustable V-groove structure, which can be used to achieve sub-micron scale alignment control with zero rotational torque. This device not only makes fiber alignment easy and fast but also maintains the fiber attachment position after alignment and epoxy bonding. Multiple fiber array alignment can be carried out with only a global alignment of two end fibers.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: January 27, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Benjamin P. Law, Andrew J. Schmit, Jonathan N. Simon, Kirk S. Giboney
  • Publication number: 20030217476
    Abstract: A method is disclosed by which precision alignment of optical fiber to wave-guide or other optical elements can be carried out with an adjustable microstructure in active alignment mode fiber attachment. A microstructure containing three elongated U-grooves can be combined effectively to produce a movable and adjustable V-groove structure, which can be used to achieve sub-micron scale alignment control with zero rotational torque. This device not only makes fiber alignment easy and fast but also maintains the fiber attachment position after alignment and epoxy bonding. Multiple fiber array alignment can be carried out with only a global alignment of two end fibers.
    Type: Application
    Filed: May 24, 2002
    Publication date: November 27, 2003
    Inventors: Benjamin P. Law, Andrew J. Schmit, Jonathan N. Simon, Kirk S. Giboney
  • Patent number: 6487056
    Abstract: The present invention provides an improved bias magnet-to-magnetoresistive element interface and method of fabrication. In a preferred embodiment, the wall/walls of an MR element opposing a bias layer are formed by over etching to provide vertical side walls without taper. In the preferred embodiment, a protective element is formed over the MR element to protect it during etch processes. In some embodiments, a filler layer is deposited prior to bias layer formation. In CIP embodiments, any portion of the filler layer forming on vertical side walls of the MR element is etched to provide an exposed side wall surface for contiguous bias layer formation. In CPP embodiments, the filler layer forms on a vertical back wall and electrically insulates the MR element from the bias layer.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: November 26, 2002
    Assignee: Read-Rite Corporation
    Inventors: Matthew Gibbons, Kenneth E. Knapp, Ronald A. Barr, Benjamin P. Law, James Spallas, Ming Zhao
  • Patent number: 6433970
    Abstract: The present invention provides an improved current perpendicular to the plane thin film read head device and method of fabrication. With the present invention, the lower lead is formed to inhibit accumulation of redeposited lead material on CPP sensor element side walls during CPP sensor formation. In the preferred embodiment, the upper portion of the lower lead, which normally is etched during sensor element formation, is formed of a low sputter yield material to reduce redeposition flux to the sensor side walls. It is also preferred to form the upper portion of a material that also has a low value for the ratio of its sputter yield at the lead milling angle-to-its sputter yield at the side wall milling angle to inhibit redeposition accumulation on the side wall. It is preferred to clad conventional lead material with a low sputter yield ratio, low resistivity material, to inhibit side wall redeposition accumulation while also providing a low resistance lower lead.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: August 13, 2002
    Assignee: Read-Rite Corporation
    Inventors: Kenneth E. Knapp, Ronald A. Barr, Lien-Chang Wang, Benjamin P. Law, James Spallas
  • Patent number: 6421212
    Abstract: The present invention provides an improved bias magnet-to-magnetoresistive element interface and method of fabrication. In a preferred embodiment, the wall/walls of an MR element opposing a bias layer are formed by over etching to provide vertical side walls without taper. In the preferred embodiment, a protective element is formed over the MR element to protect it during etch processes. In some embodiments, a filler layer is deposited prior to bias layer formation. In CIP embodiments, any portion of the filler layer forming on vertical side walls of the MR element is etched to provide an exposed side wall surface for contiguous bias layer formation. In CPP embodiments, the filler layer forms on a vertical back wall and electrically insulates the MR element from the bias layer.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: July 16, 2002
    Assignee: Read-Rite Corporation
    Inventors: Matthew Gibbons, Kenneth E. Knapp, Ronald A. Barr, Benjamin P. Law, James Spallas, Ming Zhao