Abstract: A multichip configuration in which a plurality of semiconductor chips in a module are connected together in such a way that the voltage drop across internal gate resistors is minimized, in order in the event of a short circuit to prevent the short circuit current rising with the gate voltage.

Abstract: A hybrid power MOSFET, comprising a MOSFET and a junction FET, the MOSFET and the junction FET being electrically connected in series is disclosed. In accordance with the present invention, the hybrid power MOSFET is provided with a device for reducing the change in the gate voltage of the junction FET. Thus, a hybrid power MOSFET is obtained in which high over-voltages no longer arise and whose EMC response is much improved.

Abstract: The invention provides a method by which losses are reduced during the commutation of a free-running, driven power converter valve (T2) of an invertor phase (2) to a current-accepting power converter valve (T1) of said invertor phase (2). The current-accepting power converter valve (T1) is switched on at the beginning of the commutation process and the free-running, driven power converter valve (T2) is rapidly switched off as soon as the value of its drain voltage (UD) is zero.

Abstract: A semiconductor device contains a lateral power element. The power element is provided within a semiconductor layer formed of a semiconductor material having an energy gap of at least 2 eV and is laterally bounded by a trench in the semiconductor layer. The semiconductor layer is provided on a substrate having a thermal conductivity greater than that of silicon and is electrically insulated from a substrate surface remote from the semiconductor layer. This results in an integratable semiconductor device having a high reverse voltage and a high switching frequency.

Abstract: An electronic switching device includes at least one first and one second semiconductor component, with a first anode connection and a second cathode connection being short-circuited. A control voltage that can be applied to a first grid connection is also at least partially present at a second grid connection. This reduces the forward resistance of the electronic switching device in the switched-on state.

Abstract: A multichip configuration in which a plurality of semiconductor chips in a module are connected together in such a way that the voltage drop across internal gate resistors is minimized, in order in the event of a short circuit to prevent the short circuit current rising with the gate voltage.

Abstract: A method and an apparatus for balancing the power loss in at least two electrically parallel-connected cascode circuits, which each have a low-blocking semiconductor switch composed of silicon and a high-blocking-capability semiconductor switch composed of silicon carbide is disclosed. According to the present invention, an output voltage of each low-blocking-capability semiconductor switch is detected, with correction values being established as a function of them, and being superimposed on corresponding control signals for the low-blocking-capability semiconductor switches. An unbalanced current distributor can thus be actively balanced.

Abstract: A hybrid power MOSFET having a low blocking-capability MOSFET and a high blocking-capability junction FET is disclosed. In accordance with the present invention, this cascode circuit has at least two high blocking-capability junction FETs which are electrically connected in parallel and whose gate connections are respectively electrically conductively connected to the source connection of the low blocking-capability MOSFET by means of a connecting line. Thus, a hybrid power MOSFET for a high current-carrying capacity is obtained whose design technology has been considerably simplified on account of the use of only one control line and n+1 chips.

Abstract: The invention relates to a method for reducing losses during the commutation of a free-running, driven power converter valve (T2) of an invertor phase (2) to a current-accepting power converter valve (T1) of said invertor phase (2). According to the invention, the current-accepting power converter valve (T1) is switched on at the beginning of the commutation process and the free-running, driven power converter valve (T2) is rapidly switched off as soon as the value of its drain voltage (UD) is zero. The losses during the commutation process can thus be significantly reduced in a simple manner.

Abstract: An electronic switching device includes at least one first and one second semiconductor component, with a first anode connection and a second cathode connection being short-circuited. A control voltage that can be applied to a first grid connection is also at least partially present at a second grid connection. This reduces the forward resistance of the electronic switching device in the switched-on state.

Abstract: A circuit arrangement for precharging the capacitor connected to the output of a line-commutated power converter is described, where an element which limits the charging current of the capacitor to a level which is largely independent of the charging voltage is connected between a direct voltage output of the power converter and the respective terminal of the capacitor.