Abstract: Aspects of the disclosure provide methods and apparatuses for generating an internal reset signal that is synchronous to a clock signal. In some embodiments, an apparatus includes a clock switch circuit and a plurality of serially coupled D flip-flops (DFFs). The clock switch circuit receiving the clock signal can output the clock signal in an on state and block the clock signal in an off state. The plurality of serially coupled DFFs are coupled to the clock switch circuit and driven by the clock signal. If an external reset signal is enabled, the plurality of serially coupled DFFs can enable the internal reset signal. If the external reset signal is disabled, after a predefined number of clock signal cycles, the plurality of serially coupled DFFs can disable the internal reset signal.

Abstract: Aspects of the disclosure provide methods and apparatuses for generating an internal reset signal that is synchronous to a clock signal. In some embodiments, an apparatus includes a clock switch circuit and a plurality of serially coupled D flip-flops (DFFs). The clock switch circuit receiving the clock signal can output the clock signal in an on state and block the clock signal in an off state. The plurality of serially coupled DFFs are coupled to the clock switch circuit and driven by the clock signal. If an external reset signal is enabled, the plurality of serially coupled DFFs can enable the internal reset signal. If the external reset signal is disabled, after a predefined number of clock signal cycles, the plurality of serially coupled DFFs can disable the internal reset signal.

Abstract: A quadrature transmitter includes a first and second matched transmitter path. Each transmitter path receives respective sets of quadrature baseband signals. At least one local oscillator port receives respective sets of quadrature LO signals. Mixer stage(s) respectively multiply the sets of quadrature baseband signals with the respective sets of quadrature LO signals to produce a respective output radio frequency signal. A combiner combines the output RF signals. The first set of quadrature signals is a substantially 45° phase shifted version of the second set of quadrature signals; and the first set of quadrature LO signals is a reverse substantially 45° phase shifted version of the second set of quadrature LO signals. A baseband error correction circuit corrects a phase error between the quadrature baseband signals at baseband and a LO error correction circuit corrects a phase error between the quadrature baseband signals at a LO frequency.

Abstract: A wireless communication unit includes an antenna arrangement; an aperture tuner operably coupled to a first port of the antenna arrangement; a measurement circuit operably coupled to an antenna input feed point of the antenna arrangement and arranged to measure a parameter. A controller, operably coupled to the aperture tuner, is arranged to perform closed loop aperture tuning using the measured parameter.

Abstract: A quadrature transmitter includes a first and second matched transmitter path. Each transmitter path receives respective sets of quadrature baseband signals. At least one local oscillator port receives respective sets of quadrature LO signals. Mixer stage(s) respectively multiply the sets of quadrature baseband signals with the respective sets of quadrature LO signals to produce a respective output radio frequency signal. A combiner combines the output RF signals. The first set of quadrature signals is a substantially 45° phase shifted version of the second set of quadrature signals; and the first set of quadrature LO signals is a reverse substantially 45° phase shifted version of the second set of quadrature LO signals. A baseband error correction circuit corrects a phase error between the quadrature baseband signals at baseband and a LO error correction circuit corrects a phase error between the quadrature baseband signals at a LO frequency.

Abstract: Methods and apparatus are provided for detection path design for reflection coefficient estimation. In one novel aspect, a hardware-based phase estimator estimates a phase shift between the forward path signal and the reverse path signal. In one embodiment, a data selector is used to pass only signals above a magnitude threshold. In another embodiment, a modified phase unwrap algorithm stores an unwrapping correction for subsequent samples and updates the stored unwrapping correction upon processing of each sample processed. In another novel aspect, mixed hardware and software solutions are used. In one embodiment, the reference signal and the detection signals are matched such that the modulation signal interference is removed. In some embodiments, one or two power detectors and a cross-correlator are used. In yet another embodiment, two detection measurement paths are used to obtain the reflection coefficient. In one embodiment, fractional timing offset is estimated to obtain the reflection coefficient.

Abstract: A system is described that comprises: a master device and a slave device. The slave device comprises: a first die comprising an interface comprising a decoder configured to support a MIPI™ RFFE slave protocol; at least one second die comprising a simplified address decoder, operably coupled to the first die; and a shared control bus that is configured to support at least a clock signal and a data signal shared between the master device and the at least one second die on the slave device. The interface of the first die is configured to generate at least one circuit enable signal, routed to the at least one second die. The simplified address decoder is configured to process the clock signal and the data signal in response to the at least one circuit enable signal.

Abstract: A quadrature transmitter is described that comprises: a first transmitter path and a second transmitter path that are matched. Each transmitter path comprises: at least one input arranged to receive respective first or second sets of quadrature baseband signals; at least one local oscillator, LO, port configured to receive respective first and second sets of quadrature LO signals; at least one mixer stage coupled to the at least one input and configured to respectively multiply the sets of quadrature baseband signals with the respective first or second sets of quadrature LO signals to produce a respective output radio frequency, RF, signal; and a combiner configured to combine the output radio frequency signals of the first transmitter path and the second transmitter path.

Abstract: A method of transmit power control in a mobile telecommunications device is provided. One of a plurality of signal paths providing different output power and different gains is assigned in a first gain adjustment and a first power measurement in a current time slot. The same one of the signal paths is assigned in at least a second gain adjustment and a second power measurement in the same current time slot.

Abstract: A transformer includes a first winding conductor and a second winding conductor, magnetically coupled to the first winding conductor. A first transformation ratio is achieved between the second winding conductor and the first winding conductor. A first distance between the first winding conductor and the second winding conductor is higher than a distance threshold, and accordingly, a first coupling factor between the first winding conductor and the second winding conductor is lower than a coupling factor threshold.

Abstract: A quadrature transmitter is described that comprises: a first transmitter path and a second transmitter path that are matched. Each transmitter path comprises: at least one input arranged to receive respective first or second sets of quadrature baseband signals; at least one local oscillator, LO, port configured to receive respective first and second sets of quadrature LO signals; at least one mixer stage coupled to the at least one input and configured to respectively multiply the sets of quadrature baseband signals with the respective first or second sets of quadrature LO signals to produce a respective output radio frequency, RF, signal; and a combiner configured to combine the output radio frequency signals of the first transmitter path and the second transmitter path.

Abstract: Methods and apparatus are provided for detection path design for reflection coefficient estimation. In one novel aspect, a hardware-based phase estimator estimates a phase shift between the forward path signal and the reverse path signal. In one embodiment, a data selector is used to pass only signals above a magnitude threshold. In another embodiment, a modified phase unwrap algorithm stores an unwrapping correction for subsequent samples and updates the stored unwrapping correction upon processing of each sample processed. In another novel aspect, mixed hardware and software solutions are used. In one embodiment, the reference signal and the detection signals are matched such that the modulation signal interference is removed. In some embodiments, one or two power detectors and a cross-correlator are used. In yet another embodiment, two detection measurement paths are used to obtain the reflection coefficient. In one embodiment, fractional timing offset is estimated to obtain the reflection coefficient.

Abstract: Methods and apparatus are provided for detection path design for reflection coefficient estimation. In one novel aspect, a hardware-based phase estimator estimates a phase shift between the forward path signal and the reverse path signal. In one embodiment, a data selector is used to pass only signals above a magnitude threshold. In another embodiment, a modified phase unwrap algorithm stores an unwrapping correction for subsequent samples and updates the stored unwrapping correction upon processing of each sample processed. In another novel aspect, mixed hardware and software solutions are used. In one embodiment, the reference signal and the detection signals are matched such that the modulation signal interference is removed. In some embodiments, one or two power detectors and a cross-correlator are used. In yet another embodiment, two detection measurement paths are used to obtain the reflection coefficient. In one embodiment, fractional timing offset is estimated to obtain the reflection coefficient.

Abstract: A system is described that comprises: a master device and a slave device. The slave device comprises: a first die comprising an interface comprising a decoder configured to support a MIPI™ RFFE slave protocol; at least one second die comprising a simplified address decoder, operably coupled to the first die; and a shared control bus that is configured to support at least a clock signal and a data signal shared between the master device and the at least one second die on the slave device. The interface of the first die is configured to generate at least one circuit enable signal, routed to the at least one second die. The simplified address decoder is configured to process the clock signal and the data signal in response to the at least one circuit enable signal.

Abstract: A wireless receiver with high linearity, having an out-band signal bypass filter, a mixer, and a baseband circuit. The out-band signal bypass filter has a first terminal and a second terminal respectively receiving a positive differential signal and a negative differential signal from a former-stage circuit, and the out-band signal bypass filter provides an out-band signal bypass path from the first terminal to the second terminal. The mixer receives a filtered signal from the out-band signal bypass filter. The baseband circuit is coupled to the mixer for generation of an in-phase signal and a quadrature phase signal.

Abstract: An impedance tuning control apparatus has a processing circuit and an output circuit. The processing circuit determines a first control setting according to a first performance metric, and performs a search operation with a search start point set by the first control setting to find a second control setting according to a second performance metric. The second performance metric is different from the first performance metric. The output circuit outputs a final control setting to a tuner, wherein the final control setting is derived from the second control setting.

Abstract: The invention provides a body-contact metal-oxide-semiconductor field effect transistor (MOSFET) device. The body-contact MOSFET device includes a substrate. An active region is disposed on the substrate. A gate strip is extended along a first direction disposed on a first portion of the active region. A source doped region and a drain doped region are disposed on a second portion and a third portion of the active region, adjacent to opposite sides of the gate strip. The opposite sides of the gate strip are extended along the first direction. A body-contact doped region is disposed on a fourth portion of the active region. The body-contact doped region is separated from the gate strip by a fifth portion of the active region. The fifth portion is not covered by any silicide features.

Abstract: A calibration method is applied to a wireless communication device having a programmable tuner and a signal processing path. The calibration method includes at least the following steps: configuring the programmable tuner to have a plurality of different tuner states, wherein the signal processing path has a first end and a second end, and the programmable tuner is coupled to the second end; when the programmable tuner is configured to have one of the different tuner states, obtaining a measured reflection coefficient at the first end of the signal processing path; and calibrating mapping relationship between a reflection coefficient at the first end of the signal processing path and a reflection coefficient at the second end of the signal processing path according to the different tuner states and measured reflection coefficients associated with the different tuner states.

Abstract: A method of closed-loop antenna tuning (CLAT) search strategy based on maximum Relative Transducer Gain (RTG) is proposed. A search region that account for TX input mismatch and forward voltage gain is pre-computed. The search region that is independent of antenna load can be pre-computed to reduce the computation complexity. The Maximum RTG is searched by estimating antenna S-parameters corresponding to a good load match. The search is conducted between the peak forward voltage gain and the best load match. Global optimal with reasonable RTG can be found with limited number of iterations. The transmitter search region can further be constrained by the receiver path mismatching.

Abstract: A wireless receiver with high linearity, having an out-band signal bypass filter, a mixer, and a baseband circuit. The out-band signal bypass filter has a first terminal and a second terminal respectively receiving a positive differential signal and a negative differential signal from a former-stage circuit, and the out-band signal bypass filter provides an out-band signal bypass path from the first terminal to the second terminal. The mixer receives a filtered signal from the out-band signal bypass filter. The baseband circuit is coupled to the mixer for generation of an in-phase signal and a quadrature phase signal.